?2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
SG6932 " Rev. 1.1.3
13
Functional Description
The highly integrated SG6932 is designed for power
supplies with boost PFC and forward PWM. It requires
very few external components to achieve versatile
protections and compensation.
The
proprietary
interleave-switching
feature
synchronizes the PFC and PWM stages and reduces
switching noise. At light load, the switching frequency is
linearly decreased to reduce power consumption.
The PFC function is implemented by average-current-
mode   control.   The   proprietary   switching   charge
multiplier-divider   provides   a   high   degree   of   noise
immunity for the PFC circuit. This enables the PFC
circuit to operate over a much wider region. The
proprietary multi-vector output voltage control scheme
provides a fast transient response in a low-bandwidth
PFC loop; in which the overshoot and undershoot of
the PFC voltage are clamped. If the feedback loop; is
broken, the SG6932 shuts off PFC to prevent extra-
high voltage on output.
For   the   forward   PWM,   the   synchronized   slope
compensation ensures the stability of the current loop
under continuous-mode operation. Hiccup operation
during output overloading is guaranteed. To prevent the
power supply from drawing large current during start-
up, the start-up for PWM stage is delayed 4ms after the
PFC output voltage reaches its set value.
SG6932 provides complete protection functions, such
as brownout protection and built-in latch for over-
voltage and RI open/short.
I
AC
Signal
Figure 24 shows the IAC pin connected to input voltage
by a resistor and the current, I
AC,
is the input for PFC
multiplier. For the linear range of I
AC
0~360糀, the
range   input   voltage   should   be   connected   to   a
resistance over 1.2M?
Figure 24. Input Voltage Detection
Switching Frequency / Current Sources
The switching frequency can be programmed by the
resistor R
I
connected between the RI and GND pins.
The relationship is:
(  )
)
kHz
(
k&
R
1560
f
I
PWM
=
(1)
For example, a 24k& resistor R
I
results in a 65kHz
switching frequency. Accordingly, constant current I
T
flows through R
I
:
(mA)
)
k
(
R
V
2
.
1
I
I
T
?/DIV>
=
(2)
I
T
is used to generate internal current reference.
Line Voltage Detection (VRMS)
Figure 25 shows a resistive divider with low-pass
filtering for line-voltage detection on the VRMS pin. The
V
RMS
  voltage   is   used for the PFC multiplier and
brownout protection. For brownout protection, when the
V
RMS
voltage drops below 0.8V, OPFC turns off.
0.47礔~4.7礔
Figure 25. Line-Voltage Detection on VRMS Pin
Interleave Switching
The SG6932 uses interleaved switching to synchronize
the PFC and PWM stages. This reduces switching
noise and spreads the EMI emissions. Figure 26 shows
off-time (t
OFF
) inserted between the turn-off of the PFC
gate drives and the turn-on of the PWM.
Figure 26. Interleaved Switching
OPFC
OPWM
TOFF
t
OFF