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Si3056
Si3018/19/10
Rev. 1.05
91
DOCUMENT CHANGE LIST
Revision 0.2 to Revision 0.71
Updated list of applications on cover page, including
ability to support V.92 modems.
Updated Transmit Full Scale Level test condition and
note in
Table 4 (AC Characteristics) for description of
VCID and DRCID.
C3, (10% to 20% tolerance relaxation on same value
cap) Q4-5 (voltage rating was misstated at 60 V,
changed to correct 80 V value), R51-52 power rating
relaxed from 1/10 W to 1/16 W, and updated
recommended ferrite bead part numbers.
Fixed several grammatical errors in functional
descriptions, and globally replaced all instances of
CTR21 with TBR21.
features and changes to consider when migrating to
the Si3056.
Updated “Power Supplies” functional description to
reflect 5 V tolerance on Si3056 input pins.
functional description.
description.
description.
Updated “Power Management” functional description
to qualify description to qualify wake-on-ring support
in low-power sleep mode.
description.
functional description.
description.
available exclusively with the Si3019 line-side.
Updated the following bit descriptions:
R4.7
R12.4–0
R14.2
R17.4
R20-21
R28
R29
R31.0,3,7
R38–41
Updated “Ordering Guide.”
Added list of support documentation.
Revision 0.71 to Revision 1.0
Added Si3010 to data sheet title, and to Line-Side
device support functional description, and
application circuit.
Updated Tables 2, 3, & 4 based on production test
results.
Updated Table 4 with footnotes to explain expected
DR and THD when using the Si3056 with the Si3010
low-speed line-side device.
Updated BOM.
Updated Country Specific Register Settings.
Updated the following functional descriptions:
Line Voltage/Loop Current Sensing
Interrupts
DC Termination
Ring Detection
Ring Validation
Ringer Impedance and Threshold
Caller ID
Overload Detection
Gain Control (added diagram)
Power Management
Revision Identification
Updated Register Summary
Updated the following Register Descriptions
Register 1 bit 1
Register 3 bit 1 (added bit description)
Register 4 bit 1 (added bit description)
Register 5 bit 2
Register 12 bits 4:0
Register 13 bit 6
Register 16 bit 0
Register 18 bit 1
Register 19 bit 1
Register 24 bits 5:0
Register 31 bit 7
Updated ordering guide
Added Evaluation Board ordering guide