参数资料
型号: SI5316-EVB
厂商: Silicon Laboratories Inc
文件页数: 21/26页
文件大小: 0K
描述: BOARD EVAL FOR SI5316
标准包装: 1
主要目的: 计时,时钟发生器
已用 IC / 零件: SI5316
已供物品: 板,线缆,CD,文档
Si5316
4
Rev. 1.0
1. Electrical Specifications
Table 1. Recommended Operating Conditions
(VDD = 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, TA = –40 to 85 C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Temperature Range
TA
–40
25
85
C
Supply Voltage
VDD
3.3 V nominal
2.97
3.3
3.63
V
2.5 V nominal
2.25
2.5
2.75
V
1.8 V nominal
1.71
1.8
1.89
V
Note: All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions.
Typical values apply at nominal supply voltages and an operating temperature of 25 °C unless otherwise noted.
Table 2. DC Characteristics
(VDD = 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, TA = –40 to 85 C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Supply Current
(Supply current is indepen-
dent of VDD)
IDD
LVPECL Format
622.08 MHz Out
217
243
mA
CMOS Format
19.44 MHz Out
194
220
mA
CKIN Input Pins
Input Common Mode
Voltage
(Input Threshold Voltage)
VICM
1.8 V ±5%
0.9
1.4
V
2.5 V ±10%
1.0
1.7
V
3.3 V ±10%
1.1
1.95
V
Input Resistance
CKNRIN
Single-ended
20
40
60
k
Input Voltage Level Limits
CKNVIN
See note 2
0—
VDD
V
Single-ended Input Voltage
Swing
VISE
fCKIN < 212.5 MHz
0.2
VPP
fCKIN > 212.5 MHz
0.25
VPP
Differential Input
Voltage Swing
VID
fCKIN < 212.5 MHz
0.2
VPP
fCKIN > 212.5 MHz
0.25
VPP
Notes:
1. LVPECL outputs require nominal VDD > 2.5 V.
2. No overshoot or undershoot.
3. This is the amount of leakage that the 3L inputs can tolerate from an external driver. See Figure 3 on page 10. In most
designs, an external resistor voltage divider is recommended.
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