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参数资料
| 型号： | SI5366-C-GQ |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 15/32页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK MULTIPLIER PREC 100TQFP |
| 标准包装： | 90 |
| 系列： | DSPLL® |
| 类型： | 时钟放大器，振动衰减器 |
| PLL： | 是 |
| 输入： | 时钟 |
| 输出： | CML，CMOS，LVDS，LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 4:5 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 1.05GHz |
| 除法器/乘法器： | 无/是 |
| 电源电压： | 1.71 V ~ 2.75 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-TQFP |
| 供应商设备封装： | 100-TQFP（14x14） |
| 包装： | 托盘 |
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Si5366
22
Rev. 1.0
56
FOS_CTL
I
3-Level
Frequency Offset Control.
This pin enables or disables use of the CKIN2 FOS reference
as an input to the clock selection state machine.
L = FOS Disabled.
M = Stratum 3/3E FOS Threshold.
H = SONET Minimum Clock FOS Threshold.
This pin has both weak pull-ups and weak pull-downs and
defaults to M. Some designs may require an external resistor
voltage divider when driven by an active device that will tri-
state.
58
C1A
O
LVCMOS
CKIN1 Active Clock Indicator.
This pin serves as the CKIN1 active clock indicator.
0 = CKIN1 is not the active input clock.
1 = CKIN1 is currently the active input clock to the PLL.
59
C2A
O
LVCMOS
CKIN2 Active Clock Indicator.
This pin serves as the CKIN2 active clock indicator.
0 = CKIN2 is not the active input clock.
1 = CKIN2 is currently the active input clock to the PLL.
60
61
BWSEL0
BWSEL1
I
3-Level
Bandwidth Select.
These pins are three level inputs that select the DSPLL closed
loop bandwidth. Detailed operations and timing characteristics
for these pins may be found in the Any-Frequency Precision
Clock Family Reference Manual.
These pins have both weak pull-ups and weak pull-downs and
default to M. Some designs may require an external resistor
voltage divider when driven by an active device that will tri-
state.
66
67
DIV34_0
DIV34_1
I
3-Level
CKOUT3 and CKOUT4 Divider Control.
These pins control the division of CKOUT3 and CKOUT4 rela-
tive to the CKOUT2 output frequency. Detailed operations and
timing characteristics for these pins may be found in the Any-
Frequency Precision Clock Family Reference Manual.
These pins have both weak pull-ups and weak pull-downs and
default to M. Some designs may require an external resistor
voltage divider when driven by an active device that will tri-
state.
68
69
70
71
FRQSEL0
FRQSEL1
FRQSEL2
FRQSEL3
I
3-Level
Multiplier Select.
These pins are three level inputs that select the input clock and
clock multiplication setting according to the Any-Frequency
Precision Clock Family Reference Manual, depending on the
FRQTBL setting.
These pins have both weak pull-ups and weak pull-downs and
default to M. Some designs may require an external resistor
voltage divider when driven by an active device that will tri-
state.
77
78
CKOUT3+
CKOUT3–
OMULTI
Clock Output 3.
Differential output clock with a frequency specified by FRQSEL
and FRQTBL settings. Output is differential for LVPECL, LVDS,
and CML compatible modes. For CMOS format, both output
pins drive identical single-ended clock outputs.
Table 8. Si5366 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SI5366-C-GQR | 功能描述:时钟合成器/抖动清除器 Pin-Progrm Precision Clk Xplier 4In/5Out RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| SI5366-EVB | 制造商:Silicon Laboratories Inc 功能描述: |
| SI5367 | 制造商:SILABS 制造商全称:SILABS 功能描述:レP-PROGRAMMABLE PRECISION CLOCK MULTIPLIER |
| Si5367/68-EVB | 功能描述:时钟和定时器开发工具 Si5367/Si5368 EVAL BOARD RoHS:否 制造商:Texas Instruments 产品:Evaluation Modules 类型:Clock Conditioners 工具用于评估:LMK04100B 频率:122.8 MHz 工作电源电压:3.3 V |
| Si5367A-B-GQ | 功能描述:时钟合成器/抖动清除器 uP-PROGRAMMABE CLK MULT 10 MHZ-1.4 GHZ RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
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