参数资料
型号: SI5366-C-GQ
厂商: Silicon Laboratories Inc
文件页数: 16/32页
文件大小: 0K
描述: IC CLOCK MULTIPLIER PREC 100TQFP
标准包装: 90
系列: DSPLL®
类型: 时钟放大器,振动衰减器
PLL:
输入: 时钟
输出: CML,CMOS,LVDS,LVPECL
电路数: 1
比率 - 输入:输出: 4:5
差分 - 输入:输出: 是/是
频率 - 最大: 1.05GHz
除法器/乘法器: 无/是
电源电压: 1.71 V ~ 2.75 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 100-TQFP
供应商设备封装: 100-TQFP(14x14)
包装: 托盘
Si5366
Rev. 1.0
23
80
95
SFOUT1
SFOUT0
I
3-Level
Signal Format Select.
Three level inputs that select the output signal format (common
mode voltage and differential swing) for all of the clock outputs
except FS_OUT. See DBL_FS pin descripition.
Bypass mode is not supported with CMOS outputs. These pins
have both weak pull-ups and weak pull-downs and default to
M. Some designs may require an external resistor voltage
divider when driven by an active device that will tri-state.
82
83
CKOUT1–
CKOUT1+
OMULTI
Clock Output 1.
Differential output clock with a frequency specified by FRQSEL
and FRQTBL. Output signal format is selected by SFOUT pins.
Output is differential for LVPECL, LVDS, and CML compatible
modes. For CMOS format, both output pins drive identical sin-
gle-ended clock outputs.
85
DBL34
I
LVCMOS
Output 3 and 4 Disable.
Active high input. When active, entire CKOUT3 and CKOUT4
divider and output buffer path is powered down. CKOUT3 and
CKOUT4 outputs will be in tristate mode during powerdown.
This pin has a weak pull-up.
87
88
FS_OUT–
FS_OUT+
OMULTI
Frame Sync Output.
Differential 8 kHz frame sync output or fifth high-speed clock
output with a frequency specified by FRQSEL and FRQTBL.
Output signal format is selected by SFOUT pins. Detailed oper-
ations and timing characteristics for this pin may be found in
the Any-Frequency Precision Clock Family Reference Manual.
Output is differential for LVPECL, LVDS, and CML compatible
modes. For CMOS format, both output pins drive identical sin-
gle-ended clock outputs.
92
93
CKOUT2+
CKOUT2–
OMULTI
Clock Output 2.
Differential output clock with a frequency specified by FRQSEL
and FRQTBL. Output signal format is selected by SFOUT pins.
Output is differential for LVPECL, LVDS, and CML compatible
modes. For CMOS format, both output pins drive identical sin-
gle-ended clock outputs.
Table 8. Si5366 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
SFOUT[1:0]
Signal Format
HH
Reserved
HM
LVDS
HL
CML
MH
LVPECL
MM
Reserved
ML
LVDS—Low Swing
LH
CMOS
LM
Disabled
LL
Reserved
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