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参数资料
| 型号： | SI7196DP-T1-GE3 |
| 厂商： | Vishay Siliconix |
| 文件页数： | 1/9页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 30V 16A PPAK 8SOIC |
| 产品目录绘图： | DP-T1-(G)E3 Series 8-SOIC |
| 标准包装： | 1 |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 30V |
| 电流 - 连续漏极(Id) @ 25° C： | 16A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 11 毫欧 @ 12A，10V |
| Id 时的 Vgs(th)（最大）： | 3V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 38nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 1577pF @ 15V |
| 功率 - 最大： | 41.6W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | PowerPAK? SO-8 |
| 供应商设备封装： | PowerPAK? SO-8 |
| 包装： | 标准包装 |
| 产品目录页面： | 1662 (CN2011-ZH PDF) |
| 其它名称： | SI7196DP-T1-GE3DKR |
Si7196DP
Vishay Siliconix
N-Channel 30-V (D-S) MOSFET
PRODUCT SUMMARY
FEATURES
V DS (V)
30
R DS(on) ( Ω )
0.011 at V GS = 10 V
0.0145 at V GS = 4.5 V
I D (A) a
16 g
16 g
Q g (Typ.)
13.2 nC
? Halogen-free According to IEC 61249-2-21
Available
? Extremely Low Qgd WFET ? Technology
for Switching Losses
PowerPAK SO-8
? 100 % R g Tested
? 100 % Avalanche Tested
APPLICATIONS
6.15 mm
1
S
2
S
3
S
5.15 mm
G
4
? Notebook
? Core Voltage High-Side
? System Power Low-Side
D
D
8
7
D
D
G
6
D
5
Bottom View
Ordering Information: Si7196DP-T1-E3 (Lead (Pb)-free)
Si7196DP-T1-GE3 (Lead (Pb)-free and Halogen-free)
ABSOLUTE MAXIMUM RATINGS T A = 25 °C, unless otherwise noted
S
P-Channel MOSFET
Parameter
Drain-Source Voltage
Gate-Source Voltage
T C = 25 °C
Symbol
V DS
V GS
Limit
30
± 20
16 g
Unit
V
Continuous Drain Current (T J = 150 °C)
T C = 70 °C
T A = 25 °C
I D
16 g
15.8 b, c
Pulsed Drain Current
Continuous Source-Drain Diode Current
Single Pulse Avalanche Current
Single Pulse Avalanche Energy
T A = 70 °C
T C = 25 °C
T A = 25 °C
L = 0.1 mH
I DM
I S
I AS
E AS
12.7 b, c
50
16 g
4.5 b, c
20
20
A
mJ
T C = 25 °C
41.6
Maximum Power Dissipation
T C = 70 °C
T A = 25 °C
P D
26.6
5 b, c
W
T A = 70 °C
3.2 b, c
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature) d, e
T J , T stg
- 55 to 150
260
°C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
Maximum Junction-to-Ambient b, f
Maximum Junction-to-Case (Drain)
t ≤ 10 s
Steady State
R thJA
R thJC
21
2.4
25
3.0
°C/W
Notes:
a. Based on T C = 25 °C.
b. Surface Mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. See Solder Profile ( www.vishay.com/ppg?73257 ). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection.
e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under Steady State conditions is 70 °C/W.
g. Package Limited.
Document Number: 70336
S09-0273-Rev. C, 16-Feb-09
www.vishay.com
1
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