参数资料
型号: SI7425DN-T1-E3
厂商: Vishay Siliconix
文件页数: 10/12页
文件大小: 0K
描述: MOSFET P-CH D-S 12V PPAK 1212-8
标准包装: 3,000
系列: TrenchFET®
FET 型: MOSFET P 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 12V
电流 - 连续漏极(Id) @ 25° C: 8.3A
开态Rds(最大)@ Id, Vgs @ 25° C: 16 毫欧 @ 12.6A,4.5V
Id 时的 Vgs(th)(最大): 1V @ 300µA
闸电荷(Qg) @ Vgs: 39nC @ 4.5V
功率 - 最大: 1.5W
安装类型: 表面贴装
封装/外壳: PowerPAK? 1212-8
供应商设备封装: PowerPAK? 1212-8
包装: 带卷 (TR)
AN822
Vishay Siliconix
105
130
Spreading Copper (s q . in.)
120
Spreading Copper (s q . in.)
95
110
8 5
75
100
90
8 0
65
100 %
70
50 %
100 %
55
50 %
60
0 %
0 %
45
50
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
Figure 5. Spreading Copper - Si7401DN
CONCLUSIONS
As a derivative of the PowerPAK SO-8, the PowerPAK
1212-8 uses the same packaging technology and has
been shown to have the same level of thermal perfor-
mance while having a footprint that is more than 40 %
smaller than the standard TSSOP-8.
Recommended PowerPAK 1212-8 land patterns are
provided to aid in PC board layout for designs using this
new package.
www.vishay.com
4
Figure 6. Spreading Copper - Junction-to-Ambient Performance
The PowerPAK 1212-8 combines small size with attrac-
tive thermal characteristics. By minimizing the thermal
rise above the board temperature, PowerPAK simplifies
thermal design considerations, allows the device to run
cooler, keeps r DS(ON) low, and permits the device to
handle more current than a same- or larger-size MOS-
FET die in the standard TSSOP-8 or SO-8 packages.
Document Number 71681
03-Mar-06
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