参数资料
型号: SI8250DK
厂商: Silicon Laboratories Inc
文件页数: 11/32页
文件大小: 0K
描述: DEVELOPMENT KIT FOR SI8250/1/2
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 1,隔离
输出电压: 1V
电流 - 输出: 35A
输入电压: 36 ~ 75 V
稳压器拓扑结构: 降压
频率 - 开关: 400kHz
板类型: 完全填充
已供物品: 板,线缆,CD,电源,USB 适配器
已用 IC / 零件: SI8250,SI8251,SI8252
Si8250/1/2
Table 11. Reset Electrical Characteristics
T A = –40 to +125 °C, V DD = 2.5 V, SYSCLK = 25 MHz, PLLCLK = 200 MHz unless otherwise specified.
Parameter
RST output low voltage
RST input high voltage
RST input low voltage
RST input pull-up current
V DD POR threshold
Missing clock detector timeout
Conditions
I OL = 8.5 mA, V DD = 2.5 V
RST = 0.0
Time from last system clock
rising edge to start of reset
Min
0.7 x V DD
2.0
Typ
25
2.1
250
Max
0.7
0.3 x V DD
45
2.2
650
Units
V
V
V
μA
V
μs
Delay between release of any
Reset time delay
Minimum RST low time to gen-
erate a System Reset
V DD monitor turn-on time
V DD monitor supply current
reset source and code execu-
tion at location 0x0000
5.0
6.5
100
40
μs
μs
μs
μA
Table 12. Flash Electrical Characteristics
T A = –40 to +125 °C, V DD = 2.25 to 2.75 V, SYSCLK = 25 MHz, PLLCLK = 200 MHz unless otherwise specified.
Parameter
Flash size
Endurance
Read cycle time
Erase cycle time
Write cycle time
Conditions
Si8250
Si8251, Si8252
50 MHz system clock
50 MHz system clock
Min
32768 *
16384 *
10 k
40
32
76
Typ
100 k
Max
48
114
Units
bytes
Erase/Write
ns
ms
μs
*Note: The last 512 bytes of memory are reserved.
Rev. 1.0
11
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