参数资料
型号: SI8250DK
厂商: Silicon Laboratories Inc
文件页数: 6/32页
文件大小: 0K
描述: DEVELOPMENT KIT FOR SI8250/1/2
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 1,隔离
输出电压: 1V
电流 - 输出: 35A
输入电压: 36 ~ 75 V
稳压器拓扑结构: 降压
频率 - 开关: 400kHz
板类型: 完全填充
已供物品: 板,线缆,CD,电源,USB 适配器
已用 IC / 零件: SI8250,SI8251,SI8252
Si8250/1/2
Table 4. ADC0 (12-Bit ADC) Specifications
T A = –40 to +125 °C, V DD = 2.5 V, SYSCLK = 25 MHz, PLLCLK = 200 MHz unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
DC Accuracy
Resolution
Integral nonlinearity
12
±2
bits
LSB
Differential nonlinearity
Offset error
Full scale error
Offset temperature coefficient
Guaranteed Monotonic
Differential Mode
±3
3
13600
±1
LSB
LSB
LSB
ppm/°C
Dynamic Performance (10 kHz sine-wave Single-ended input, 0 to 1 dB below Full Scale, 200 ksps)
Signal-to-noise plus distortion
64
dB
Total harmonic distortion
Spurious-free dynamic range
Up to the 5 th harmonic
83
–73
dB
dB
Conversion Rate
Conversion time in SAR clocks
Track/Hold acquisition time
Throughput rate
Note 1
Note 2
1
13
200
clocks
μs
ksps
Analog Inputs
Input voltage range
Input capacitance
0
15
V REF
V
pF
Temperature Sensor
Linearity
Gain
Offset
Notes 3, 4
Notes 3, 4
Notes 3, 4 (Temp = 0 °C)
±0.2
1353
488
°C
μV/°C
mV
Power Specifications
Power supply current
Operating Mode, 200 ksps
780
μA
(V DD supplied to ADC0)
Power-on time
Power supply rejection
After V REF settle,
before tracking begins
5
0.7
μs
mV/V
Notes:
1. An additional two F CLK cycles are required to start and complete a conversion.
2. Additional tracking time may be required depending on the output impedance connected to the ADC input.
3. Represents one standard deviation from the mean.
4. Includes ADC offset, gain, and linearity variations.
6
Rev. 1.0
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