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参数资料
| 型号： | SI9122EDQ-T1-E3 |
| 厂商： | Vishay Siliconix |
| 文件页数： | 10/20页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR ISO PWM VM 20-TSSOP |
| 标准包装： | 3,000 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 600kHz |
| 占空比： | 95% |
| 电源电压： | 10.5 V ~ 13.2 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽） |
| 包装： | 带卷 (TR) |
Si9122E
Vishay Siliconix
normal switching frequency. When a severe overcurrent
condition occurs (V THCL < V CS ), the NMOS discharges
C L_CONT capacitor immediately at 2 mA rate and the
C L_CONT voltage will be clamped to 1.2 V disabling both DL
and DH outputs.
Before V CS reaches severe overcurrent condition, a lowering
of the C L_CONT voltage results in PWM control of the output
drive being taken over by the current limit control loop
through C L_CONT . Current control initially reduces the
switching duty cycle toward the minimum the chip can reach
(D MIN ). If this duty cycle reduction still cannot lower the load
current, then the switching frequency will start to fold back to
minimum 1/5 of the nominal frequency. This prevents the
on-time of the primary drivers from being reduced to below
100 ns and avoids current tails. If V CS > V THCL , the switching
will then stop.
With constant current mode control and frequency foldback,
protection of the MOSFET switches is increased. The
converter reverts to voltage mode operation immediately
when the primary current falls below the limit level, and
C L_CONT capacitor is charged up and clamped to 6.5 V. The
soft-start function does not apply during current limit period,
as this would constitute hiccup mode operation.
However, if the divided voltage applied to the V INDET pin is
greater than V CC - 0.3 V, the high-side driver, DH, will stop
switching until the voltage drops below V CC - 0.3 V. Thus, the
resistive tap on the V IN divider must be set to accommodate
the normal V CC operating voltage to avoid this condition.
Alternatively, a zener clamp diode from V INDET to GND may
also be used.
Shutdown Mode
If V INDET is forced below the lower V SD threshold, the device
will enter SHUTDOWN mode. This powers down all
unnecessary functions of the controller, ensures that the
primary switches are off, and results in a low level current
demand from the V IN or V CC supplies.
V I N EXT
R EXT
V I N
12 V
P N P Ext
V IN Voltage Monitor - V INDET
The chip provides a means of sensing the voltage of V IN , and
withholding operation of the output drivers until a minimum
H V DMOS
REG_COMP
V CC
A u xillary
V CC
voltage of V REF (3.3 V, 300 mV hysteresis), is achieved. This
is achieved by choosing an appropriate resistive tap between
the ground and V IN , and comparing this voltage with the
reference voltage. When the applied voltage is greater than
V REF , the output drivers are activated as normal. V INDET also
provides the input to the voltage feedforward function.
V REF
C EXT
2 nF
14.5 V
C V CC
0.5 μF
G N D
Figure 5. High-Voltage Pre-Regulator Circuit
V CC
I PU
A V
OSC
Peak Detect
+
-
GM
120 μA (nom)
V OFFSET
C L_CLAMP
C L_CO N T
CS1
CS2
Blank
-
+
A V
A V
150 m V
+
GM
I PD
R EXT
C EXT
-
0 to 240 μA (nom)
www.vishay.com
10
A V
100 m V
Figure 6. Current Limit Circuit
Document Number: 73866
S-80112-Rev. D, 21-Jan-08
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