参数资料
型号: SIP11206DLP-T1-E3
厂商: Vishay Siliconix
文件页数: 10/19页
文件大小: 0K
描述: IC REG CTRLR ISO PWM MLP44-16
标准包装: 2,500
PWM 型: 控制器
输出数: 1
频率 - 最大: 1MHz
占空比: 50%
电源电压: 10.5 V ~ 13.2 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: PowerPAK? MLP44-16
包装: 带卷 (TR)
SiP11206
Vishay Siliconix
due to some external reset condition the pre-regulator is in
low power standby mode and the internal bias network is
powered down. When V INDET is greater than V SDH but less
than V REF and V CC is forced to 12 V the pre-regulator shuts
off drawing only leakage current from V IN and quiescent
current from V CC . In this mode the controller output drivers
remains static (non-switching). When V INDET is above V REF
the controller is enabled and both drivers are switching at half
the oscillator frequency. If SiP11206 is shut down via this pin,
its restart will be by means of a soft-start cycle, as described
under "Soft Start" and "Hiccup-Mode Operation" above.
The input impedance to ground of this pin is typically
46K ± 30 % and must be taken into account at application
design. An external 10:1 resistor divider ratio of supply
voltage to V INDET pin is required in a typical application.
Primary High and Low Side MOSFET Drivers
The low-side MOSFET driver is powered directly from V CC of
the chip. The high-side MOSFET however requires the gate
voltage to be higher than V IN . This is achieved with a charge
pump capacitor C BST between BST and LX, and an external
diode to charge and bootstrap the initial charge up voltage
across C BST to V CC level. On the alternate oscillator cycle
the boost diode isolates BST from V IN and hence BST and
LX steps up to V IN + V CC and V IN , respectively. This
sequencing insures that DL will always turn on before DH
during start-up. The boost capacitor value must be chosen to
meet the application droop rate requirement.
External Frequency Synchronization
The oscillator frequency of this IC can be synchronized to an
external source with a simple circuit shown in "Circuit for
Frequency Synchronization" diagram. The synchronized
frequency should not exceed 1.4 times the set frequency,
and the synchronized frequency range should not exceed
the IC frequency range.
TYPICAL CHARACTERISTICS
10.2
10.0
9. 8
7.5
7.0
9.6
9.4
9.2
9.0
8 . 8
8 .6
8 .4
8 .2
6.5
6.0
5.5
5.0
4.5
V I N = 75 V
- 40
- 15
10
35
60
8 5
110
135
- 40
- 15
10
35
60
8 5
110
135
3.35
3.30
Temperat u re (°C)
V REG vs. Temperature
8 .0
7.5
Temperat u re (°C)
I VIN vs. Temperature
3.25
3.20
V U V H
7.0
6.5
V CC = 12 V
I CC
6.0
3.15
5.5
3.10
3.05
3.00
V U V L
5.0
4.5
4.0
I Q
- 40
- 15
10
35
60
8 5
110
135
- 40
- 15
10
35
60
8 5
110
135
www.vishay.com
10
Temperat u re (°C)
V UV vs. Temperature
Temperat u re (°C)
I CC and I Q vs. Temperature
Document Number: 69232
S-81795-Rev. C, 04-Aug-08
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