SL05T1 Series
http://onsemi.com
4
Applications Background
This new family of TVS devices (SL05T1 series) are
designed to protect sensitive electronics such as
communications systems, computers, and computer
peripherals against damage due to ESD conditions or
transient voltage conditions. Because of their low
capacitance value (less than 5 pF), they can be used in high
speed I/O data lines. Low capacitance is achieved by
integrating a compensating diode in series with the TVS
which is basically based in the below theoretical principle:
Capacitance in parallel: CT = C1+C2+....+Cn
Capacitance in series: 1/CT = (1/C1)+(1/C2)+....+(1/Cn)
The Figure
5 shows the integrated solution of the SL05T1
series device:
Figure 5.
COMPENSATING
DIODE
TVS
In the case that an overvoltage condition occurs in the I/O
line protected by the SL05T1 series device, the TVS is
reversedbiased while the compensation diode is
forwardbiased so the resulting current due to the transient
voltage is drained to ground.
If protection in both polarities is required, an additional
device is connected in inverseparallel with reference to the
first one, the Figure
6 illustrates the inverseparallel
connection for bidirectional or unidirectional lines:
Figure 6.
3
2
1
3
2
1
An alternative solution to protect unidirectional lines, is to
connect a fast switching steering diode in parallel with the
SL05T1 series device. When the steering diode is
forwardbiased, the TVS will avalanche and conduct in
reverse direction. It is important to note that by adding a
steering diode, the effective capacitance in the circuit will be
increased, therefore the impact of adding a steering diode
must be taken in consideration to establish whether the
incremental capacitance will affect the circuit functionality
or not. The Figure
7 shows the connection between the
steering diode and the SL05T1 series device:
Figure 7.
STEERING DIODE
SL05T1 DEVICE
Another typical application in which the SL05T1 series
device can be utilized, is to protect multiple I/O lines. The
protection in each of the I/O lines is achieved by connecting
two devices in inverseparallel. The Figure
8 illustrates how
multiple I/O line protection is achieved:
Figure 8.
OUTPUT
INPUT
For optimizing the protection, it is recommended to use ground planes and short path lengths to minimize the PCB’s ground inductance.