参数资料
型号: SL28540ALC
厂商: Silicon Laboratories Inc
文件页数: 10/25页
文件大小: 0K
描述: IC CLOCK CK540 LP MOBILE 56QFN
标准包装: 260
类型: 时钟/频率发生器
PLL:
主要目的: Intel CPU 服务器
输入: 晶体
输出: HCSL,LVCMOS
电路数: 1
比率 - 输入:输出: 1:17
差分 - 输入:输出: 无/是
频率 - 最大: 200MHz
电源电压: 3.135 V ~ 3.465 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 56-VFQFN 裸露焊盘
供应商设备封装: 56-QFN(8x8)
包装: 托盘
SL28540
................................................... Document #: Page 18 of 25
AC Electrical Specifications
Parameter
Description
Condition
Min.
Max.
Unit
Crystal
TDC
XIN Duty Cycle
The device operates reliably with input
duty cycles up to 30/70 but the REF clock
duty cycle will not be within specification
47.5
52.5
%
TPERIOD
XIN Period
When XIN is driven from an external
clock source
69.841
71.0
ns
TR/TF
XIN Rise and Fall Times
Measured between 0.3VDD and 0.7VDD
–10.0
ns
TCCJ
XIN Cycle to Cycle Jitter
As an average over 1-
s duration
500
ps
CPU at 0.8V
TDC
CPUT and CPUC Duty Cycle
Measured at 0V differential at 0.1s
45
55
%
TPERIOD
100 MHz CPUT and CPUC Period
Measured at 0V differential at 0.1s
9.99900
10.0010
ns
TPERIOD
133 MHz CPUT and CPUC Period
Measured at 0V differential at 0.1s
7.49925
7.50075
ns
TPERIOD
166 MHz CPUT and CPUC Period
Measured at 0V differential at 0.1s
5.99940
6.00060
ns
TPERIOD
200 MHz CPUT and CPUC Period
Measured at 0V differential at 0.1s
4.99950
5.00050
ns
TPERIODSS
100 MHz CPUT and CPUC Period, SSC Measured at 0V differential at 0.1s
10.02406
10.0261
ns
TPERIODSS
133 MHz CPUT and CPUC Period, SSC Measured at 0V differential at 0.1s
7.51805
7.51955
ns
TPERIODSS
166 MHz CPUT and CPUC Period, SSC Measured at 0V differential at 0.1s
6.01444
6.01564
ns
TPERIODSS
200 MHz CPUT and CPUC Period, SSC Measured at 0V differential at 0.1s
5.01203
5.01303
ns
TPERIODAbs
100 MHz CPUT and CPUC Absolute
period
Measured at 0V differential at 1 clock
9.91400
10.0860
ns
TPERIODAbs
133 MHz CPUT and CPUC Absolute
period
Measured at 0V differential at 1 clock
7.41425
7.58575
ns
TPERIODAbs
166 MHz CPUT and CPUC Absolute
period
Measured at 0V differential @ 1 clock
5.91440
6.08560
ns
TPERIODAbs
200 MHz CPUT and CPUC Absolute
period
Measured at 0V differential @ 1 clock
4.91450
5.08550
ns
TPERIODSSAbs 100 MHz CPUT and CPUC Absolute
period, SSC
Measured at 0V differential @ 1 clock
9.93906
10.1362
ns
TPERIODSSAbs 133 MHz CPUT and CPUC Absolute
period, SSC
Measured at 0V differential @ 1 clock
7.43305
7.62340
ns
TPERIODSSAbs 166 MHz CPUT and CPUC Absolute
period, SSC
Measured at 0V differential @ 1 clock
5.92944
6.11572
ns
TPERIODSSAbs 200 MHz CPUT and CPUC Absolute
period, SSC
Measured at 0V differential @ 1 clock
4.92703
5.11060
ns
TCCJ
CPUT/C Cycle to Cycle Jitter
Measured at 0V differential
85
ps
TCCJ2
CPU2_ITP Cycle to Cycle Jitter
Measured at 0V differential
125
ps
LACC
Long-term Accuracy
Measured at 0V differential
100
ppm
TSKEW
CPU1 to CPU0 Clock Skew
Measured at 0V differential
100
ps
TSKEW2
CPU2_ITP to CPU0 Clock Skew
Measured at 0V differential
150
ps
TR/TF
CPU Rising and Falling slew rate
Measured differentially from ±150 mV
2.5
8
V/ns
TRFM
Rise/Fall Matching
Measured single-endedly from ±75 mV
20
%
VHIGH
Voltage High
1.15
V
VLOW
Voltage Low
–0.3
V
VOX
Crossing Point Voltage at 0.7V Swing
300
550
mV
SRC at 0.8V
TDC
SRCT and SRCC Duty Cycle
Measured at 0V differential
45
55
%
TPERIOD
100 MHz SRC Period
Measured at 0V differential @ 0.1s
9.99900
10.0010
ns
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