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参数资料
型号： SM320C6701W14
厂商： Texas Instruments, Inc.
元件分类： 数字信号处理
英文描述： FLOATING-POINT DIGITAL SIGNAL PROCESSOR
中文描述： 浮点数字信号处理器
文件页数： 36/64页
文件大小： 939K
代理商： SM320C6701W14
SGUS030B
–
APRIL 2000
–
REVISED MAY 2001
36
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
SYNCHRONOUS-BURST MEMORY TIMING (CONTINUED)
timing requirements for synchronous-burst SRAM cycles (half-rate SSCLK) (see Figure 16)
NO.
’
C6701-14
MIN
’
C6701-16
MIN
UNIT
MAX
MAX
7
tsu(EDV-SSCLKH)
th(SSCLKH-EDV)
Setup time, read EDx valid before SSCLK high
3.8
3.8
ns
8
Hold time, read EDx valid after SSCLK high
1.5
1.5
ns
switching characteristics for synchronous-burst SRAM cycles
(half-rate SSCLK)
(see Figure 16 and Figure 17)
NO.
PARAMETER
’
C6701-14
’
C6701-16
UNIT
MIN
MAX
MIN
MAX
1
tosu(CEV-SSCLKH)
toh(SSCLKH-CEV)
tosu(BEV-SSCLKH)
toh(SSCLKH-BEIV)
tosu(EAV-SSCLKH)
toh(SSCLKH-EAIV)
tosu(ADSV-SSCLKH)
toh(SSCLKH-ADSV)
tosu(OEV-SSCLKH)
toh(SSCLKH-OEV)
tosu(EDV-SSCLKH)
toh(SSCLKH-EDIV)
tosu(WEV-SSCLKH)
toh(SSCLKH-WEV)
The effects of internal clock jitter are included at test. There is no need to adjust timing numbers for internal clock jitter.
When the PLL is used (CLKMODE x4), P = 1/CPU clock frequency in ns. For example, when running parts at 167 MHz, use P = 6 ns.
For CLKMODE x1:
1.5P = P + PH, where P = 1/CPU clock frequency, and PH = pulse duration of CLKIN high.
0.5P = PL, where PL = pulse duration of CLKIN low.
Output setup time, CEx valid before SSCLK high
1.5P
–
5.5
1.5P
–
4.5
ns
2
Output hold time, CEx valid after SSCLK high
0.5P
–
2.3
0.5P
–
2
ns
3
Output setup time, BEx valid before SSCLK high
1.5P
–
5.5
1.5P
–
4.5
ns
4
Output hold time, BEx invalid after SSCLK high
0.5P
–
2.3
0.5P
–
2
ns
5
Output setup time, EAx valid before SSCLK high
1.5P
–
5.5
1.5P
–
4.5
ns
6
Output hold time, EAx invalid after SSCLK high
0.5P
–
2.3
0.5P
–
2
ns
9
Output setup time, SSADS valid before SSCLK high
1.5P
–
5.5
1.5P
–
4.5
ns
10
Output hold time, SSADS valid after SSCLK high
0.5P
–
2.3
0.5P
–
2
ns
11
Output setup time, SSOE valid before SSCLK high
1.5P
–
5.5
1.5P
–
4.5
ns
12
Output hold time, SSOE valid after SSCLK high
0.5P
–
2.3
0.5P
–
2
ns
13
Output setup time, EDx valid before SSCLK high
1.5P
–
5.5
1.5P
–
4.5
ns
14
Output hold time, EDx invalid after SSCLK high
0.5P
–
2.3
0.5P
–
2.2
ns
15
Output setup time, SSWE valid before SSCLK high
1.5P
–
5.5
1.5P
–
4.5
ns
16
Output hold time, SSWE valid after SSCLK high
0.5P
–
2.3
0.5P
–
2
ns
相关PDF资料
PDF描述
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相关代理商/技术参数
参数描述
SM320C6701W16 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGITAL SIGNAL PROCESSOR
SM320C6701ZMBW14 功能描述:数字信号处理器和控制器 - DSP, DSC Floating Point Dig Signal Proc Military RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
SM320C6711B-EP 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGTAL SIGNAL PROCESSORS
SM320C6711C-EP 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGTAL SIGNAL PROCESSORS
SM320C6711D-EP 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGTAL SIGNAL PROCESSORS
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