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参数资料
| 型号： | SM5L3 |
| 厂商： | SHARP ELECTRONICS CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, MROM, MICROCONTROLLER, PQFP80 |
| 封装： | 14 X 20 MM, PLASTIC, QFP-80 |
| 文件页数： | 16/27页 |
| 文件大小： | 164K |
| 代理商： | SM5L3 |
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4-Bit Single Chip Microcomputers
SM5L1/SM5L2/SM5L3
Microcomputer Data Sheet
23
BOOSTER CIRCUIT
The device contains a booster circuit which gener-
ates a voltage two time higher than 1.5 V power supply.
It is necessary to apply external capacitors between
DDC pin and VCC pin as well as VDD pin and GND (see
Figure 30).
BLANK DISPLAY
There are two ways blank the entire display to match
the purpose.
Blanking the display for a short time
– Set bit 0 of the RF register to ‘1’: Display
– Set bit 0 of the RF register to ‘0’: Blank state
Blanking the display for a long period mainly to
reduce supply current.
– Set bit 0 and 1 of the RF register to ‘1’: Display
– Set bit 0 and 1 of the RF register to ‘0’: Blank state
When bit 1 of the RF register is set ‘0’, the booster cir-
cuit does not operate and the common outputs and seg-
ment outputs are fixed to VM level, and the display
blanks. By cutting off the function of the booster circuit,
the supply current can be greatly reduced. However,
when the display is blanked using the second method,
the response speed of the LCD returning to the display
state drops slightly. The RF register is on the blank state
after initialization (reset state) from hardware reset.
INSTRUCTION SET
Definition of Symbols
The following symbols are used in descriptions for
the instructions.
Each bit of a register can be represented. For exam-
ple the ith bit of X register and R(0) register are rep-
resented as Xi and R(0) i. (i = 0, 1, 2, 3, …)
Increment and decrement denote the binary addition
of 1H and FH, respectively.
To skip a certain instruction means that the instruc-
tion is ignored and that no operation is performed
until the execution transfers to the next instruction. In
other words, the instruction is regarded as a NOP
instruction. Therefore, one cycle is required to skip a
one-word instruction and two cycles are required to
skip a two word instruction.
ROM Address Control Instructions
Figure 30. Booster Circuit
C1 = 0.1 F (TYP.)
C2 = 0.1 F (TYP.)
5L1-30
SM5Lx
DDC
VCC
VDD
SYMBOL
DEFINITION
M
Content of RAM at the address specified by
the B register
←
Transfer direction
∪
Logical OR
∩
Logical AND
⊕
Logical XOR
Ai
ith bit of the ACC
Push
Contents of the PC are decremented to the
stack register
Pop
The decremented contents are transferred
back to the PC
Pj
Pj register (j = 3, 2, 1, 0)
Rj
Rj register (j = F, E, D)
ROM (
)
ROM contents for address within (
)
Cy
Carry of ALU (different from the C flag)
MNE-
MONIC
MACHINE
CODE
OPERATIONS
TR x
80 to BF
PL ← x (I5 –I0)
TL xy
E0 to EF
00 to FF
PU ← x (I11 –I6)
PL ← y (I5 –I0)
TRS x
C0 to DF
Push, PU ← 01H,
PL ← x (I4, I3, I2, I1, I0, 0)
CALL xy
F0 to FF
00 to FF
Push, PU ← x (I11 –I6)
PL ← y (I5 – I0)
RTN
7D
Pop
RTNS
7E
Pop, skip the next step
RTNI
7F
Pop, IME
← 1
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