参数资料
型号: SN54ACT74W
厂商: TEXAS INSTRUMENTS INC
元件分类: 锁存器
英文描述: ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14
封装: CERAMIC, DFP-14
文件页数: 7/9页
文件大小: 177K
代理商: SN54ACT74W
Product Folder: SN74ACT74, Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset
PRODUCT SUPPORT: TRAINING
SN74ACT74, Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset
DEVICE STATUS: ACTIVE
PARAMETER NAME SN54ACT74 SN74ACT74
Voltage Nodes (V) 5
5
Vcc range (V)
4.5 to 5.5
Input Level
TTL
Output Level
CMOS
Output Drive (mA)
-24/24
Output
3S
No. of Bits
2
Static Current
0.02
th (ns)
1
tpd max (ns)
13
tsu (ns)
3.5
FEATURES
q
Inputs Are TTL-Voltage Compatible
q
EPIC TM (Enhanced-Performance Implanted CMOS) 1-um Process
q
Package Options Include Plastic Small-Outline (DW) Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard
Plastic (N) and Ceramic (J) DIPs
EPIC is a trademark of Texas Instruments Incorporated.
DESCRIPTION
The 'ACT74 dual positive-edge-triggered devices are D-type flip-flops.
A low level at the preset (PRE\) or clear (CLR\) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the data (D) input
meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time
of the clock pulse. Following the hold-time interval, data at D can be changed without affecting the levels at the outputs.
The SN54ACT74 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ACT74 is characterized for operation from -40°C to 85°C.
TECHNICAL DOCUMENTS
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DATASHEET
file:///H|/imaging/BITTING/cpl/20020930_1/09272002_10/TXII/09272002_HTML/sn74act74.html (1 of 3) [Oct-03-2002 2:59:22 PM]
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