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| 型号： | SN54LVTH182646AHV |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | Octal 3-State Noninverting Buffer/Line Driver/Line Receiver; Package: TSSOP 20 LEAD; No of Pins: 20; Container: Rail; Qty per Container: 75 |
| 中文描述： | 的3.3V ABT生根粉扫描测试设备与18位收发器和寄存器 |
| 文件页数： | 11/36页 |
| 文件大小： | 551K |
| 代理商： | SN54LVTH182646AHV |
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SN54LVTH18646A, SN54LVTH182646A, SN74LVTH18646A, SN74LVTH182646A
3.3-V ABT SCAN TEST DEVICES
WITH 18-BIT TRANSCEIVERS AND REGISTERS
SCBS311D – MARCH 1994 – REVISED JUNE 1997
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
data register description
boundary-scan register
The boundary-scan register (BSR) is 52 bits long. It contains one boundary-scan cell (BSC) for each
normal-function input pin, one BSC for each normal-function I/O pin (one single cell for both input data and
output data), and one BSC for each of the internally decoded output-enable signals (1OEA, 2OEA, 1OEB,
2OEB). The BSR is used 1) to store test data that is to be applied externally to the device output pins, and/or
2) to capture data that appears internally at the outputs of the normal on-chip logic and/or externally at the device
input pins.
The source of data to be captured into the BSR during Capture-DR is determined by the current instruction. The
contents of the BSR can change during Run-Test/Idle, as determined by the current instruction. At power up
or in Test-Logic-Reset, BSCs 51–48 are reset to logic 0, ensuring that these cells, which control A-port and
B-port outputs, are set to benign values (i.e., if test mode were invoked the outputs would be at high-impedance
state). Reset values of other BSCs should be considered indeterminate.
When external data is to be captured, the BSCs for signals 1OEA, 2OEA, 1OEB, and 2OEB capture logic values
determined by the following positive-logic equations:
1OEA
1OE
1DIR, 2OEA
2OE
2DIR, 1OEB
1OE
DIR, 2OEB
2OE
DIR
When data is to be applied externally, these BSCs control the drive state (active or high impedance) of their
respective outputs.
The BSR order of scan is from TDI through bits 51–0 to TDO. Table 1 shows the BSR bits and their associated
device pin signals.
Table 1. Boundary-Scan Register Configuration
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
51
2OEB
35
2A9-I/O
17
2B9-I/O
50
1OEB
34
2A8-I/O
16
2B8-I/O
49
2OEA
33
2A7-I/O
15
2B7-I/O
48
1OEA
32
2A6-I/O
14
2B6-I/O
47
2DIR
31
2A5-I/O
13
2B5-I/O
46
1DIR
30
2A4-I/O
12
2B4-I/O
45
2OE
29
2A3-I/O
11
2B3-I/O
44
1OE
28
2A2-I/O
10
2B2-I/O
43
2CLKAB
27
2A1-I/O
9
2B1-I/O
42
1CLKAB
26
1A9-I/O
8
1B9-I/O
41
2CLKBA
25
1A8-I/O
7
1B8-I/O
40
1CLKBA
24
1A7-I/O
6
1B7-I/O
39
2SAB
23
1A6-I/O
5
1B6-I/O
38
1SAB
22
1A5-I/O
4
1B5-I/O
37
2SBA
21
1A4-I/O
3
1B4-I/O
36
1SBA
20
1A3-I/O
2
1B3-I/O
––
––
19
1A2-I/O
1
1B2-I/O
––
––
18
1A1-I/O
0
1B1-I/O
相关PDF资料 |
PDF描述 |
|---|---|
| SN54LVTH18646AHV | Octal 3-State Noninverting Buffer/Line Driver/Line Receiver; Package: SOEIAJ-20; No of Pins: 20; Container: Tape and Reel; Qty per Container: 2000 |
| SN54LVTH182652AHV | Octal 3-State Noninverting Buffer/Line Driver/Line Receiver; Package: TSSOP 20 LEAD; No of Pins: 20; Container: Tape and Reel; Qty per Container: 2500 |
| SN54LVTH18652AHV | Octal 3-State Noninverting Buffer/Line Driver/Line Receiver; Package: 20 LEAD PDIP; No of Pins: 20; Container: Rail; Qty per Container: 18 |
| SN54LVTH18512 | 3.3-V ABT Scan Test Device With 18-Bit Universal Bus Transceivers(3.3VABT扫描测试装置(18位通用总线收发器)) |
| SN54LVTH182512 | 3.3-V ABT Scan Test Device With 18-Bit Universal Bus Transceivers(3.3VABT扫描测试装置(18位通用总线收发器)) |
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