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参数资料
| 型号： | SN54LVTH374FK |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | 8/Bit Shift Register; Package: SOIC 16 LEAD; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500 |
| 中文描述： | 的3.3V ABT生根粉八路边沿触发的D型倒装3触发器态输出 |
| 文件页数： | 2/16页 |
| 文件大小： | 468K |
| 代理商： | SN54LVTH374FK |
SCBS683H MARCH 1997 REVISED OCTOBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus
lines without need for interface or pullup components.
OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
When V
CC
is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
CC
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
These devices are fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
FUNCTION TABLE
(each flip-flop)
INPUTS
CLK
↑
↑
H or L
OUTPUT
Q
OE
D
L
H
H
L
L
L
L
X
Q0
Z
H
X
X
logic diagram (positive logic)
OE
To Seven Other Channels
1
11
3
2
CLK
1D
C1
1D
1Q
相关PDF资料 |
PDF描述 |
|---|---|
| SN54LVTH374J | 8/Bit Shift Register; Package: SOIC 16 LEAD; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500 |
| SN54LVTH374W | 8/Bit Shift Register; Package: TSSOP-16; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500 |
| SN74LVTH374DB | 3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54LVTH540 | Octal Buffers/Drivers With 3-State Outputs(八缓冲器/驱动器(三态输出)) |
| SN54LVTH541 | Octal Buffers/Drivers With 3-State Outputs(八缓冲器/驱动器(三态输出)) |
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