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参数资料
| 型号： | SN65HVD22EVM |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | SN65HVD22 Evaluation Module(SN65HVD22评估模块) |
| 中文描述： | SN65HVD22评估模块（SN65HVD22评估模块） |
| 文件页数： | 20/25页 |
| 文件大小： | 398K |
| 代理商： | SN65HVD22EVM |
Board Layout Patterns
3-2
3.1
Board Layout Patterns
The printed wiring board (PWB) layout for the EVM is designed according to
good engineering practices for data transmission circuits. Designers can use
this layout as a guide for their applications. Special considerations include:
1) Balanced traces for the differential signals
—
the connections to the differ-
ential bus should be kept balanced, so that the electrical characteristics
of one input/output (A or B) are identical to the other. This ensures that all
electrical noise is coupled onto both channels nearly equally, allowing the
transceiver to perform with optimum noise immunity.
2) Keeping stub length short
—
the electrical connections between the trans-
ceiver and the main bus lines. This reduces reflections from signal transi-
tions. A rule of thumb is to keep the stub electrical length, in terms of propa-
gation delay, less than 40% of the signal transition time. [See also the Tex-
as Instruments Design Note Interface Circuits for TIA/EIA-485 (RS-485)].
3) Ground and power planes may be used to help reduce electrical noise in
the system.
Figure 3-1.PWB Fabrication Notes and Stackup
0.0250
”
0.040
”
0.0250
”
Signal: Layer 1
Layer 2
Layer 3
Signal: Layer 4
Stackup
Notes:
1) PWB to be fabricated to met or exceed IPC-6012, Class 3
standards and workmanship shall conform to IPC-A-600,
Class 3 current revisions.
2) Board material and construction to be UL approved and
marked on the finished board.
3) Laminate material: Copper-clad FR-4
4) Copper weight: 1 oz. finished
5) Finished thickness: 0.062
”
±
0.10
”
6) MIN. plating thickness in through holes: 0.001
”
7) SMOBC/HASL
8) LPI soldermask both sides using appropriate layer artwork:
color = red
9) LPI silkscreen as required: color = white
10)Vendor information to be incorporated on back side whenever
possible
11)Minimum copper conductor width is: 20 mils
Minimum conductor spacing is: 10 mils
12)Number of finished layers: 4
13)Top and bottom layers 42-mil traces to be 50-
impedance
Prepreg
Core
Prepreg
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SN65HVD22P | 功能描述:RS-485接口IC Extended Common-mode Transceiver RoHS:否 制造商:Texas Instruments 数据速率:250 Kbps 工作电源电压:3.3 V 电源电流:750 uA 工作温度范围:- 40 C to + 125 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| SN65HVD22PE4 | 功能描述:总线收发器 Extended Common-mode Transceiver RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN65HVD23 | 制造商:TI 制造商全称:Texas Instruments 功能描述:EXTENDED COMMON-MODE RS-485 TRANSCEIVERS |
| SN65HVD23_10 | 制造商:TI 制造商全称:Texas Instruments 功能描述:Extended Common-Mode RS-485 Transceivers |
| SN65HVD230 | 制造商:TI 制造商全称:Texas Instruments 功能描述:3.3-V CAN TRANSCEIVERS |
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