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参数资料
| 型号： | SN65LVDS122EVM |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | SN65LVDS122 Evaluation Module(SN65LVDS122评估模块) |
| 中文描述： | SN65LVDS122评估模块（SN65LVDS122评估模块） |
| 文件页数： | 14/22页 |
| 文件大小： | 270K |
| 代理商： | SN65LVDS122EVM |
Observing an Output
2-4
2.3
Observing an Output
When the SN65LVDS122 EVM is connected directly to an oscilloscope with
50
–
internal terminations to ground; resistors R4, R5, R6, and R7 are not
needed (the EVM is shipped without R4
–
R7 installed). All external cabling
needs to be matched in length to prevent skew between inverting and
noninverting signals and between channels.
The three power jacks (J10, J11, and J12) are used to provide power and a
ground reference for the EVM. The power connections to the EVM determine
the common-mode load the device outputs must drive. LVDS devices have
limited common-mode driver capability and when using 50-
termination on
each line of the signal pair, they should be connected to a 1.2-V termination
voltage with respect to the driver ground. When connecting the EVM outputs
directly to oscilloscope inputs, the oscilloscope ground becomes termination
voltage and the objective of the three power jacks (split power plane) is to
offset the SN65LVDS122, so that the termination appears as 50
to 1.2 V.
Returning to Figure 2
–
1, power supply #1 provides 3.3 V to the EVM and
power supply #2 provides the offset voltage. This offset is used to set the DUT
ground potential with respect to EVM GND. The ground returns in the SMA
connectors connects EVM GND to the oscilloscope ground. Optimum device
setup can be confirmed by adjusting the voltage on the offset power supply
until its current is minimized. It is important to note that use of the dual supplies
and offsetting the EVM relative to the DUT ground are steps needed for the
test and evaluation of devices. Actual designs would include high-impedance
receivers, which would not require offsetting the load.
If the EVM outputs are to be evaluated with a high-impedance probe, direct
probing on the EVM is supported via installation of a 100-
resistor across the
solder pads for R4 and R5 (see Figure 2
–
3) and another 100-
resistor across
the solder pads for R6 and R7. The advantage of using a high-impedance
probe is that the power supply #2 of Figure 2
–
1 can be omitted with J12 and
J11 connected together. In order to successfully offset the EVM, power supply
#2 must be able to sink current. The disadvantage is the possible bandwidth
limitations of the probe and measurement quality.
Figure 2
–
3.100- Parallel Termination Using Solder Pads From R4 and R5
To J3
To J4
100
Resistor
R4
R5
From U1
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| SN65LVDS122PW | 功能描述:模拟和数字交叉点 IC 2X2 1.5 Gbps LVDS Crosspoint Switch RoHS:否 制造商:Micrel 配置:2 x 2 封装 / 箱体:MLF-16 数据速率:10.7 Gbps 输入电平:CML, LVDS, LVPECL 输出电平:CML 电源电压-最大:3.6 V 电源电压-最小:2.375 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 产品:Digital Crosspoint 封装:Tube |
| SN65LVDS122PWG4 | 功能描述:模拟和数字交叉点 IC 2X2 1.5 Gbps LVDS Crosspoint Switch RoHS:否 制造商:Micrel 配置:2 x 2 封装 / 箱体:MLF-16 数据速率:10.7 Gbps 输入电平:CML, LVDS, LVPECL 输出电平:CML 电源电压-最大:3.6 V 电源电压-最小:2.375 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 产品:Digital Crosspoint 封装:Tube |
| SN65LVDS122PWR | 功能描述:模拟和数字交叉点 IC 2X2 1.5 Gbps LVDS Crosspoint Switch RoHS:否 制造商:Micrel 配置:2 x 2 封装 / 箱体:MLF-16 数据速率:10.7 Gbps 输入电平:CML, LVDS, LVPECL 输出电平:CML 电源电压-最大:3.6 V 电源电压-最小:2.375 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 产品:Digital Crosspoint 封装:Tube |
| SN65LVDS122PWRG4 | 功能描述:模拟和数字交叉点 IC 2X2 1.5 Gbps LVDS Crosspoint Switch RoHS:否 制造商:Micrel 配置:2 x 2 封装 / 箱体:MLF-16 数据速率:10.7 Gbps 输入电平:CML, LVDS, LVPECL 输出电平:CML 电源电压-最大:3.6 V 电源电压-最小:2.375 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 产品:Digital Crosspoint 封装:Tube |
| SN65LVDS125ADBT | 功能描述:模拟和数字交叉点 IC 4x4 1.5 Gbps LVDS Crosspoint Switch RoHS:否 制造商:Micrel 配置:2 x 2 封装 / 箱体:MLF-16 数据速率:10.7 Gbps 输入电平:CML, LVDS, LVPECL 输出电平:CML 电源电压-最大:3.6 V 电源电压-最小:2.375 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 产品:Digital Crosspoint 封装:Tube |
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