参数资料
型号: SN74AUC1G32YEAR
厂商: TEXAS INSTRUMENTS INC
元件分类: 门电路
英文描述: AUC SERIES, 2-INPUT OR GATE, PBGA5
封装: MO-211EA, DSBGA-5
文件页数: 1/14页
文件大小: 480K
代理商: SN74AUC1G32YEAR
SN74AUC1G32
SINGLE 2INPUT POSITIVEOR GATE
SCES377J SEPTEMBER 2001 REVISED MAY 2005
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Available in the Texas Instruments
NanoStar
and NanoFree Packages
D Optimized for 1.8-V Operation and Is 3.6-V
I/O Tolerant to Support Mixed-Mode Signal
Operation
D Ioff Supports Partial-Power-Down Mode
Operation
D Sub 1-V Operable
D Max tpd of 2.4 ns at 1.8 V
D Low Power Consumption, 10-A Max ICC
D ±8-mA Output Drive at 1.8 V
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
3
2
4
5
1
AVCC
Y
B
GND
DBV PACKAGE
(TOP VIEW)
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOM VIEW)
DCK PACKAGE
(TOP VIEW)
3
2
4
5
1
AVCC
Y
B
GND
3
2
4
5
1
A
Y
B
GND
A
GND
VCC
Y
B
DRL PACKAGE
(TOP VIEW)
See mechanical drawings for dimensions.
1
4
2
3
5
VCC
description/ordering information
This single 2-input positive-OR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V
to 1.95-V VCC operation.
The SN74AUC1G32 performs the Boolean function Y
+ A ) Bor Y + A B in positive logic.
NanoStar
and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
NanoStar
WCSP (DSBGA)
0.17-mm Small Bump YEA
SN74AUC1G32YEAR
NanoFree
WCSP (DSBGA)
0.17-mm Small Bump YZA (Pb-free)
Tape and reel
SN74AUC1G32YZAR
_ _ _UG_
40
°C to 85°C
NanoStar
WCSP (DSBGA)
0.23-mm Large Bump YEP
Tape and reel
SN74AUC1G32YEPR
_ _ _UG_
40
°C to 85°C
NanoFree
WCSP (DSBGA)
0.23-mm Large Bump YZP (Pb-free)
SN74AUC1G32YZPR
SOT (SOT-23) DBV
Tape and reel
SN74AUC1G32DBVR
U32_
SOT (SC-70) DCK
Tape and reel
SN74AUC1G32DCKR
UG_
SOT (SOT-553) DRL
Reel of 4000
SN74AUC1G32DRLR
UG_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb,
= Pb-free).
Copyright
2005, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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