参数资料
型号: SN74CBTLV3384DW
厂商: TEXAS INSTRUMENTS INC
元件分类: 总线收发器
英文描述: CBTLV/3B SERIES, DUAL 5-BIT DRIVER, TRUE OUTPUT, PDSO24
封装: GREEN, PLASTIC, SOIC-24
文件页数: 1/14页
文件大小: 494K
代理商: SN74CBTLV3384DW
SN74CBTLV3384
LOW-VOLTAGE 10-BIT FET BUS SWITCH
SCDS059G MARCH 1998 REVISED JUNE 2004
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D 5-Ω Switch Connection Between Two Ports
D Rail-to-Rail Switching on Data I/O Ports
D I
off Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
description/ordering information
The SN74CBTLV3384 provides ten bits of
high-speed bus switching. The low on-state
resistance of the switch allows connections to be
made with minimal propagation delay.
The device is organized as dual 5-bit bus switches
with separate output-enable (OE) inputs. It can be
used as two 5-bit bus switches or one 10-bit bus switch. When OE is low, the associated 5-bit bus switch is on,
and A port is connected to B port. When OE is high, the switch is open, and the high-impedance state exists
between the two ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that
damaging current will not backflow through the device when it is powered down. The device has isolation during
power off.
To ensure the high-impedance state during power up or power down, OE shall be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QSOP DBQ
Tape and reel
SN74CBTLV3384DBQR
CBTLV3384
SOIC
DW
Tube
SN74CBTLV3384DW
CBTLV3384
40
°C to 85°C
SOIC DW
Tape and reel
SN74CBTLV3384DWR
CBTLV3384
TSSOP PW
Tape and reel
SN74CBTLV3384PWR
CL384
TVSOP DGV
Tape and reel
SN74CBTLV3384DGVR
CL384
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
(each 5-bit bus switch)
INPUTS
INPUTS/OUTPUTS
1OE
2OE
1B11B5
2B12B5
L
1A11A5
2A12A5
L
H
1A11A5
Z
H
LZ
2A12A5
H
Z
Copyright
2004, Texas Instruments Incorporated
DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
1OE
1B1
1A1
1A2
1B2
1B3
1A3
1A4
1B4
1B5
1A5
GND
VCC
2B5
2A5
2A4
2B4
2B3
2A3
2A2
2B2
2B1
2A1
2OE
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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