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参数资料
| 型号： | SN74GTLPH1645GQLR |
| 厂商： | Texas Instruments, Inc. |
| 元件分类： | 总线收发器 |
| 英文描述： | 16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER |
| 中文描述： | 16位LVTTL至GTLP可调的EDGE速率总线收发器 |
| 文件页数： | 10/17页 |
| 文件大小： | 259K |
| 代理商： | SN74GTLPH1645GQLR |
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
SN74GTLPH1645
16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
SCES290D – OCTOBER 1999 – REVISED JUNE 2005
This device is fully specified for live-insertion applications using Ioff, power-up 3-state, and BIAS VCC. The Ioff
circuitry disables the outputs, preventing damaging current backflow through the device when it is powered
down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power
down, which prevents driver conflict. The BIAS VCC circuitry precharges and preconditions the B-port input/output
connections, preventing disturbance of active data on the backplane during card insertion or removal, and
permits true live-insertion capability.
This GTLP device features TI-OPC circuitry, which actively limits the overshoot caused by improperly terminated
backplanes, unevenly distributed cards, or empty slots during low-to-high signal transitions. This improves signal
integrity, which allows adequate noise margin to be maintained at higher frequencies.
High-drive GTLP backplane interface devices feature adjustable edge-rate control (ERC). Changing the ERC
input voltage between GND and VCC adjusts the B-port output rise and fall times. This allows the designer to
optimize system data-transfer rate and signal integrity to the backplane load.
Active bus-hold circuitry holds unused or undriven LVTTL data inputs at a valid logic state. Use of pullup or
pulldown resistors with the bus-hold circuitry is not recommended.
When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, the output-enable (OE) input should be tied to VCC
through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the
driver.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
TSSOP – DGG
Tape and reel
SN74GTLPH1645DGGR
GTLPH1645
–40
°C to 85°C
TVSOP – DGV
Tape and reel
SN74GTLPH1645DGVR
GL45
VFBGA – GQL
Tape and reel
SN74GTLPH1645GQLR
GL45
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
2
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相关代理商/技术参数 |
参数描述 |
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| SN74GTLPH1645ZQLR | 功能描述:转换 - 电压电平 16B LVTTL GTLP Adj Edge Rate RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
| SN74GTLPH1655DGG | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| SN74GTLPH1655DGGR | 功能描述:转换 - 电压电平 Triple 2-Ch Analog Mltplxr/Demltplxr RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
| SN74GTLPH16612DL | 功能描述:转换 - 电压电平 18B LVTTL To GTLP Uni Bus Transceiver RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
| SN74GTLPH16612DLR | 功能描述:转换 - 电压电平 18B LVTTL To GTLP Uni Bus Transceiver RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
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