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参数资料
| 型号： | SN74GTLPH16945DGGR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 总线收发器 |
| 英文描述： | GTLP SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48 |
| 封装： | PLASTIC, TSSOP-48 |
| 文件页数： | 1/9页 |
| 文件大小： | 127K |
| 代理商： | SN74GTLPH16945DGGR |
SN74GTLPH16945
16-BIT LVTTL-TO-GTL+ BUS TRANSCEIVER
SCES292 – OCTOBER 1999
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Bidirectional Interface Between GTL+
Signal Levels and LVTTL Logic Levels
D LVTTL Interfaces Are 5-V Tolerant
D Identical to ’16245 Function
D Medium-Drive GTL+ Outputs (50 mA)
D LVTTL Outputs (–24 mA/24 mA)
D GTL+ Rise and Fall Times Designed for
Optimal Data-Transfer Rate and Signal
Integrity
D Ioff, Power-Up 3-State, and BIAS VCC
Support Live Insertion
D Bus Hold on A-Port Data Inputs
D Distributed VCC and GND-Pin Configuration
Minimizes High-Speed Switching Noise
D Package Options Include Plastic Thin
Shrink Small-Outline (DGG), Thin Very
Small-Outline (DGV), and Shrink
Small-Outline (DL) Packages
NOTE: For tape and reel order entry:
The DGGR package is abbreviated to GR, and
the DGVR package is abbreviated to VR.
description
The SN74GTLPH16945 is a medium-drive 16-bit
bus transceiver that provides LVTTL-to-GTL+ and
GTL+-to-LVTTL signal-level translation. It is
partitioned as two 8-bit transceivers and is identical to the ’16245 function. The device provides a high-speed
interface between cards operating at LVTTL logic levels and a backplane operating at GTL+ signal levels.
High-speed (about two times faster than standard TTL or LVTTL) backplane operation is a direct result of
GTLP’s reduced output swing (<1 V), reduced input threshold levels, improved differential input, and output
edge control (OEC
). Improved GTLP OEC circuits minimize bus settling time and have been designed and
tested using several backplane models. The medium drive is suitable for driving double-terminated backplanes.
GTL+ is the Texas Instruments derivative of the Gunning transceiver logic (GTL) JEDEC standard JESD 8-3.
The AC specification of the SN74GTLPH16945 is given only at the preferred higher noise margin GTL+, but
the user has the flexibility of using this device at either GTL (VTT = 1.2 V and VREF = 0.8 V) or GTL+ (VTT = 1.5
V and VREF = 1 V) signal levels.
Normally, the B port operates at GTL or GTL+ levels, while the A-port and control inputs are compatible with
LVTTL logic levels and are 5-V tolerant. VREF is the reference input voltage for the B port.
This device is fully specified for live-insertion applications using Ioff, power-up 3-state, and BIAS VCC. The Ioff
circuitry disables the outputs, preventing damaging current backflow through the device when it is powered
down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power
down, which prevents driver conflict. The BIAS VCC circuitry precharges and preconditions the B-port
input/output connections, preventing disturbance of active data on the backplane during card insertion or
removal, and permits true live-insertion capability.
PRODUCT
PREVIEW
Copyright
1999, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OEC is a trademark of Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
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1DIR
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCC
2A5
2A6
GND
2A7
2A8
2DIR
1OE
1B1
1B2
GND
1B3
1B4
BIAS VCC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VREF
2B5
2B6
GND
2B7
2B8
2OE
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| SN74H102J | TTL/H/L SERIES, NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SN74GTLPH16945GR | 功能描述:转换 - 电压电平 16bit LVTTL-GTLP RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
| SN74GTLPH16945VR | 功能描述:总线收发器 16bit LVTTL-GTLP RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN74GTLPH306DGVR | 功能描述:转换 - 电压电平 8bit LVTTL-GTLP RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
| SN74GTLPH306DW | 功能描述:转换 - 电压电平 8-Bit LVTTL-to-GTLP Bus Transceiver RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
| SN74GTLPH306DWG4 | 功能描述:转换 - 电压电平 8B LVTTL to GTLP Bus Transceiver RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
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