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参数资料
| 型号： | SN74HC74ADBR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 锁存器 |
| 英文描述： | HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 |
| 封装： | SSOP-14 |
| 文件页数： | 1/9页 |
| 文件大小： | 144K |
| 代理商： | SN74HC74ADBR |
SN54HC74, SN74HC74
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SCLS094B – DECEMBER 1982 – REVISED MAY 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Ceramic Flat (W) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
The ’HC74 contain two independent D-type
positive-edge-triggered flip-flops. A low level at
the preset (PRE) or clear (CLR) inputs sets or
resets the outputs regardless of the levels of the
other inputs. When PRE and CLR are inactive
(high), data at the data (D) input meeting the setup
time requirements are transferred to the outputs
on the positive-going edge of the clock (CLK)
pulse. Clock triggering occurs at a voltage level
and is not directly related to the rise time of CLK.
Following the hold-time interval, data at the
D input can be changed without affecting the
levels at the outputs.
The SN54HC74 is characterized for operation
over the full military temperature range –55
°C to
125
°C. The SN74HC74 is characterized for
operation from –40
°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUTS
PRE
CLR
CLK
D
Q
L
H
X
H
L
H
LX
XL
H
L
LX
X
H
↑
HH
L
H
↑
LL
H
L
X
Q0
This configuration is unstable; that is, it does not
persist when PRE or CLR returns to its inactive
(high) level.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1CLR
1D
1CLK
1PRE
1Q
GND
VCC
2CLR
2D
2CLK
2PRE
2Q
SN54HC74 . . . J OR W PACKAGE
SN74HC74 . . . D, DB, N, OR PW PACKAGE
(TOP VIEW)
32 1 20 19
910 11 1213
4
5
6
7
8
18
17
16
15
14
2D
NC
2CLK
NC
2PRE
1CLK
NC
1PRE
NC
1Q
1D
1CLR
NC
2Q
V
2CLR
1Q
GND
NC
SN54HC74 . . . FK PACKAGE
(TOP VIEW)
CC
NC – No internal connection
Copyright
1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
相关PDF资料 |
PDF描述 |
|---|---|
| SN74HC74N-00 | HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14 |
| SNJ54HC74J-00 | HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 |
| SN74HC78N-00 | HC/UH SERIES, NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14 |
| SN74HC804DW | HC/UH SERIES, HEX 2-INPUT NAND GATE, PDSO20 |
| SNJ54HC804FK | HC/UH SERIES, HEX 2-INPUT NAND GATE, CQCC20 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SN74HC74AN | 制造商:Texas Instruments 功能描述: |
| SN74HC74AN-P2 | 制造商:Texas Instruments 功能描述: |
| SN74HC74ANS | 制造商:Texas Instruments 功能描述: |
| SN74HC74ANSR | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74HC74APWR | 制造商:Texas Instruments 功能描述: |
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