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参数资料
| 型号： | SN74HC74ADBR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 锁存器 |
| 英文描述： | HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 |
| 封装： | SSOP-14 |
| 文件页数： | 4/9页 |
| 文件大小： | 144K |
| 代理商： | SN74HC74ADBR |
SN54HC74, SN74HC74
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SCLS094B – DECEMBER 1982 – REVISED MAY 1997
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
VCC
TA = 25°C
SN54HC74
SN74HC74
UNIT
VCC
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
2 V
0
6
0
4.2
0
5
fclock
Clock frequency
4.5 V
0
31
0
21
0
25
MHz
6 V
0
36
0
25
0
29
2 V
100
150
125
PRE or CLR low
4.5 V
20
30
25
t
Pulse duration
6 V
17
25
21
ns
tw
Pulse duration
2 V
80
120
100
ns
CLK high or low
4.5 V
16
24
20
6 V
14
20
17
↑
2 V
100
150
125
↑
Data
4.5 V
20
30
25
t
Setup time before CLK
↑
6 V
17
25
21
ns
tsu
Setup time before CLK
↑
2 V
25
40
30
ns
PRE or CLR inactive
4.5 V
5
8
6
6 V
4
7
5
↑
2 V
0
th
Hold time, data after CLK
↑
4.5 V
0
ns
6 V
0
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
VCC
TA = 25°C
SN54HC74
SN74HC74
UNIT
PARAMETER
(INPUT)
(OUTPUT)
VCC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
2 V
6
10
4.2
5
fmax
4.5 V
31
50
21
25
MHz
6 V
36
60
25
29
2 V
70
230
345
290
PRE or CLR
Q or Q
4.5 V
20
46
69
58
t d
6 V
15
39
59
49
ns
tpd
2 V
70
175
250
220
ns
CLK
Q or Q
4.5 V
20
35
50
44
6 V
15
30
42
37
2 V
28
75
110
95
tt
Q or Q
4.5 V
8
15
22
19
ns
6 V
6
13
19
16
operating characteristics, TA = 25°C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Cpd
Power dissipation capacitance per flip-flop
No load
35
pF
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