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参数资料
| 型号： | SN74LV74ANS |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 锁存器 |
| 英文描述： | LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 |
| 封装： | PLASTIC, SOP-14 |
| 文件页数： | 5/8页 |
| 文件大小： | 150K |
| 代理商： | SN74LV74ANS |
SN54LV74A, SN74LV74A
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
SCLS381E – AUGUST 1997 – REVISED MAY 2000
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V
(unless otherwise noted) (see Figure 1)
PARAMETER
TA = 25°C
SN54LV74A
SN74LV74A
UNIT
PARAMETER
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
PRE or CLR low
8
9
ns
tw
Pulse duration
CLK
8
9
ns
t
Setup time before CLK
↑
Data
8
9
ns
tsu
Setup time before CLK
↑
PRE or CLR inactive
7
ns
th
Hold time, data after CLK
↑
0.5
ns
timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V
(unless otherwise noted) (see Figure 1)
PARAMETER
TA = 25°C
SN54LV74A
SN74LV74A
UNIT
PARAMETER
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
PRE or CLR low
6
7
ns
tw
Pulse duration
CLK
6
7
ns
t
Setup time before CLK
↑
Data
6
7
ns
tsu
Setup time before CLK
↑
PRE or CLR inactive
5
ns
th
Hold time, data after CLK
↑
0.5
ns
timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V
(unless otherwise noted) (see Figure 1)
PARAMETER
TA = 25°C
SN54LV74A
SN74LV74A
UNIT
PARAMETER
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
PRE or CLR low
5
ns
tw
Pulse duration
CLK
5
ns
t
Setup time before CLK
↑
Data
5
ns
tsu
Setup time before CLK
↑
PRE or CLR inactive
3
ns
th
Hold time, data after CLK
↑
0.5
ns
switching characteristics over recommended operating free-air temperature range,
VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
LOAD
TA = 25°C
SN54LV74A
SN74LV74A
UNIT
PARAMETER
(INPUT)
(OUTPUT)
CAPACITANCE
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
f
CL = 15 pF
50*
100*
40*
40
MHz
fmax
CL = 50 pF
30
70
25
MHz
t d
PRE or CLR
QorQ
CL =15 pF
9.8*
14.8*
1*
17*
1
17
ns
tpd
CLK
Q or Q
CL = 15 pF
11.1*
16.4*
1*
19*
1
19
ns
t d
PRE or CLR
QorQ
CL =50 pF
13
17.4
1
20
1
20
ns
tpd
CLK
Q or Q
CL = 50 pF
14.2
20
1
23
1
23
ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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| SN74LV74ANSR | 功能描述:触发器 Dual Pos-Edge-Trgrd D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| SN74LV74ANSRG4 | 功能描述:触发器 Dual Pos-Edge-Trgrd D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| SN74LV74APW | 功能描述:触发器 Dual Pos-Edge-Trgrd D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| SN74LV74APWE4 | 功能描述:触发器 Dual Pos-Edge-Trgrd D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| SN74LV74APWG4 | 功能描述:触发器 Dual Pos-Edge-Trgrd D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
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