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参数资料
| 型号： | SN74LVC16646ADGVR |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS |
| 中文描述： | 16位总线收发器和登记注册三态输出 |
| 文件页数： | 2/13页 |
| 文件大小： | 184K |
| 代理商： | SN74LVC16646ADGVR |
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB
or CLKBA) input.
Figure 1
illustrates the four fundamental bus-management functions that can be performed with
the SN74LVC16646A.
SN74LVC16646A
16-BIT BUS TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
SCES408B–AUGUST 2002–REVISED APRIL 2005
Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode,
data present at the high-impedance port can be stored in either register or in both. The select-control (SAB and
SBA) inputs can multiplex stored and real-time (transparent mode) data. The circuitry used for select control
eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and
real-time data. DIR determines which bus receives data when OE is low. In the isolation mode (OE high), A data
can be stored in one register and/or B data can be stored in the other register.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
When an output function is disabled, the input function still is enabled and can be used to store and transmit
data. Only one of the two buses, A or B, can be driven at a time.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
INPUTS
DATA I/O
(1)
OPERATION OR FUNCTION
OE
X
X
H
H
L
L
L
L
DIR
X
X
X
X
L
L
H
H
CLKAB
↑
X
↑
H or L
X
X
X
H or L
CLKBA
X
↑
↑
H or L
X
H or L
X
X
SAB
X
X
X
X
X
X
L
H
SBA
X
X
X
X
L
H
X
X
A1-A8
Input
Unspecified
Input
Input
Output
Output
Input
Input
B1-B8
Unspecified
Input
Input
Input
Input
Input
Output
Output
Store A, B unspecified
(1)
Store B, A unspecified
(1)
Store A and B data
Isolation, hold storage
Real-time B data to A bus
Stored B data to A bus
Real-time A data to B Bus
Stored A data to bus
(1)
The data-output functions can be enabled or disabled by various signals at OE or DIR. Data-input functions always are enabled, i.e.,
data at the bus terminals is stored on every low-to-high transition of the clock inputs.
2
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| SN74LVC16646ADL | 功能描述:总线收发器 16B Bus Transceiver And Register RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN74LVC16646ADLG4 | 功能描述:总线收发器 16B Bus Transceiver And Register RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN74LVC16646ADLR | 功能描述:总线收发器 16BBusTrans Register RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN74LVC16646ADLRG4 | 功能描述:总线收发器 16B Bus Transceiver And Register RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN74LVC16646DL | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
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