参数资料
型号: SN74LVC1G00DCKTE4
厂商: TEXAS INSTRUMENTS INC
元件分类: 门电路
英文描述: LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5
封装: GREEN, PLASTIC, SC-70, 5 PIN
文件页数: 12/19页
文件大小: 843K
代理商: SN74LVC1G00DCKTE4
SCES212W
– APRIL 1999 – REVISED MARCH 2011
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(3)
NanoStar
– WCSP (DSBGA)
0.23-mm Large Bump
– YZP
SN74LVC1G00YZPR
_ _ _ CA_
(Pb-free)
SON
– DSF
Reel of 5000
SN74LVC1G00DSFR
CA
SON
– DRY
Reel of 5000
SN74LVC1G00DRYR
CA
–40°C to 85°C
Reel of 3000
SN74LVC1G00DBVR
SOT (SOT-23)
– DBV
C00_
Reel of 250
SN74LVC1G00DBVT
Reel of 3000
SN74LVC1G00DCKR
SOT (SC-70)
– DCK
Reel of 250
SN74LVC1G00DCKT
CA_
SOT (SOT-553)
– DRL
Reel of 4000
SN74LVC1G00DRLR
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2)
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3)
DBV/DCK/DRL: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
● = Pb-free).
FUNCTION TABLE
INPUTS
OUTPUT
Y
A
B
H
L
X
H
X
L
H
LOGIC DIAGRAM (POSITIVE LOGIC)
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
6.5
V
VI
Input voltage range
–0.5
6.5
V
VO
Voltage range applied to any output in the high-impedance or power-off state(2)
–0.5
6.5
V
VO
Voltage range applied to any output in the high or low state(2) (3)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
Continuous current through VCC or GND
±100
mA
DBV package
206
DCK package
252
θJA
Package thermal impedance(4)
°C/W
DRL package
142
YZP package
132
Tstg
Storage temperature range
–65
150
°C
(1)
Stresses beyond those listed under
"absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
"recommended operating
conditions
" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
The value of VCC is provided in the recommended operating conditions table.
(4)
The package thermal impedance is calculated in accordance with JESD 51-7.
2
Copyright
1999–2011, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC1G00
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SN74LVC1G00DBVT LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5
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