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参数资料
| 型号： | SN74LVC1G123YEPR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 谐振器 |
| 英文描述： | LVC/LCX/Z SERIES, MONOSTABLE MULTIVIBRATOR, PBGA8 |
| 封装： | DSBGA-8 |
| 文件页数： | 11/18页 |
| 文件大小： | 365K |
| 代理商： | SN74LVC1G123YEPR |
www.ti.com
DECSCRIPTION/ORDERING INFORMATION (CONTINUED)
CLR
Cext
Rext/Cext
R
B
A
Q
1
2
3
7
6
5
SN74LVC1G123
SINGLE RETRIGGERABLE MONOSTABLE MULTIVIBRATOR
WITH SCHMITT-TRIGGER INPUTS
SCES586A – JULY 2004 – REVISED JUNE 2005
The output pulse duration is programmed by selecting external resistance and capacitance values. The external
timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected
between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between
Rext/Cext and VCC. The output pulse duration also can be reduced by taking CLR low.
Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input
pulse. The A and B inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition rates
with jitter-free triggering at the outputs.
Once triggered, the basic pulse duration can be extended by retriggering the gated low-level-active (A) or
high-level-active (B) input. Pulse duration can be reduced by taking CLR low. CLR can be used to override A or
B inputs. The input/output timing diagram illustrates pulse control by retriggering the inputs and early clearing.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
FUNCTION TABLE
INPUTS
OUTPUTS
Q
CLR
A
B
L
X
L
X
H
X
L(1)
X
L
L(1)
H
L
↑
H
↓
H
↑
L
H
(1)
These outputs are based on the
assumption that the indicated
steady-state conditions at the A
and B inputs have been set up
long enough to complete any
pulse started before the setup.
LOGIC DIAGRAM (POSITIVE LOGIC)
2
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SN74LVC1G123YZPR | 功能描述:单稳态多谐振荡器 SNGL Retriggerable Mono Multivibrator RoHS:否 制造商:Texas Instruments 每芯片元件:1 逻辑系列:LVC 逻辑类型:Monostable Multivibrator 封装 / 箱体:SSOP-8 传播延迟时间:18.6 ns 高电平输出电流:- 32 mA 低电平输出电流:32 mA 电源电压-最大:5.5 V 电源电压-最小:1.65 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装:Reel |
| SN74LVC1G125DBVR | 功能描述:缓冲器和线路驱动器 SINGLE BUS BUFFER GATE RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| SN74LVC1G125DBVR | 制造商:Texas Instruments 功能描述:Buffer Gate Logic IC |
| SN74LVC1G125DBVT | 功能描述:缓冲器和线路驱动器 SNGL Bus Buffer Gate RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| SN74LVC1G125DBVT | 制造商:Texas Instruments 功能描述:GATE LOGIC IC |
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