参数资料
型号: SN74LVC2G126YZAR
厂商: TEXAS INSTRUMENTS INC
元件分类: 总线收发器
英文描述: LVC/LCX/Z SERIES, DUAL 1-BIT DRIVER, TRUE OUTPUT, BGA8
封装: GREEN, MO-211EB, DSBGA-8
文件页数: 1/14页
文件大小: 372K
代理商: SN74LVC2G126YZAR
www.ti.com
FEATURES
Seemechanicaldrawingsfordimensions.
DCTPACKAGE
(TOP VIEW)
DCUPACKAGE
(TOP VIEW)
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOMVIEW)
1
V
CC
8
1OE
2
7
1A
2OE
3
6
2Y
1Y
4
5
GND
2A
3
6
1Y
2Y
8
1
V
CC
1OE
5
GND
4
2A
2
7
2OE
1A
GND
5
4
2A
3 6
1Y
2Y
2 7
2OE
1A
8
V
CC
1
1OE
DESCRIPTION/ORDERING INFORMATION
DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SCES205I – APRIL 1999 – REVISED JUNE 2006
Available in the Texas Instruments
I
off Supports Partial-Power-Down Mode
NanoStar and NanoFree Packages
Operation
Supports 5-V V
CC Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
Inputs Accept Voltages to 5.5 V
ESD Protection Exceeds JESD 22
Max t
pd of 4 ns at 3.3 V
– 2000-V Human-Body Model (A114-A)
Low Power Consumption, 10-
A Max I
CC
– 200-V Machine Model (A115-A)
±24-mA Output Drive at 3.3 V
– 1000-V Charged-Device Model (C101)
Typical V
OLP (Output Ground Bounce)
<0.8 V at V
CC = 3.3 V, TA = 25°C
Typical V
OHV (Output VOH Undershoot)
>2 V at V
CC = 3.3 V, TA = 25°C
This dual bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoStar – WCSP (DSBGA)
SN74LVC2G126YEAR
0.17-mm Small Bump – YEA
NanoFree – WCSP (DSBGA)
SN74LVC2G126YZAR
0.17-mm Small Bump – YZA (Pb-free)
Reel of 3000
_ _ _CN_
NanoStar – WCSP (DSBGA)
SN74LVC2G126YEPR
0.23-mm Large Bump – YEP
–40
°C to 85°C
NanoFree – WCSP (DSBGA)
SN74LVC2G126YZPR
0.23-mm Large Bump – YZP (Pb-free)
SSOP – DCT
Reel of 3000
SN74LVC2G126DCTR
C26_ _ _
Reel of 3000
SN74LVC2G126DCUR
VSSOP – DCU
C26_
Reel of 250
SN74LVC2G126DCUT
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA,YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 1999–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
相关PDF资料
PDF描述
SN74LVC2G14YEAR LVC/LCX/Z SERIES, DUAL 1-INPUT INVERT GATE, BGA6
SN74LVC2G14YZAR LVC/LCX/Z SERIES, DUAL 1-INPUT INVERT GATE, BGA6
SN74LVC2G14YZPR LVC/LCX/Z SERIES, DUAL 1-INPUT INVERT GATE, BGA6
SN74LVC2G157DCUR LV/LV-A/LVX/H SERIES, 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO8
SN74LVC2G157YEPR LVC/LCX/Z SERIES, 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PBGA8
相关代理商/技术参数
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