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参数资料
| 型号： | SN74LVTH162373DGG |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 总线收发器 |
| 英文描述： | LVT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封装： | TSSOP-48 |
| 文件页数： | 2/8页 |
| 文件大小： | 104K |
| 代理商： | SN74LVTH162373DGG |
SN54LVTH162373, SN74LVTH162373
3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS261J – JULY 1993 – REVISED APRIL 1999
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus
lines without interface or pullup components.
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
The outputs, which are designed to source or sink up to 12 mA, include equivalent 22-
series resistors to
reduce overshoot and undershoot.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
The SN54LVTH162373 is characterized for operation over the full military temperature range of –55
°C to 125°C.
The SN74LVTH162373 is characterized for operation from –40
°C to 85°C.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OUTPUT
OE
LE
D
Q
L
H
L
HL
L
LX
Q0
H
X
Z
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SN74LVTH162373DGGR | 功能描述:闭锁 Tri-State ABT 16-Bit RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| SN74LVTH162373DL | 功能描述:闭锁 Tri-State ABT 16-Bit RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| SN74LVTH162373DLR | 功能描述:闭锁 3.3V ABT 16B Transp DType Latche RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| SN74LVTH162373KR | 功能描述:闭锁 Tri-State ABT 16-Bit RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| SN74LVTH162374DGGR | 功能描述:触发器 3 St 3.3V ABT 16bit RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
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