参数资料
型号: SN74LVTH16652MEAX
厂商: FAIRCHILD SEMICONDUCTOR CORP
元件分类: 总线收发器
英文描述: LVT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封装: 0.300 INCH, MO-118, SSOP-56
文件页数: 1/9页
文件大小: 87K
代理商: SN74LVTH16652MEAX
2000 Fairchild Semiconductor Corporation
DS012024
www.fairchildsemi.com
January 2000
Revised January 2000
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74LVTH16652
Low Voltage 16-Bit Transceiver/Register
with 3-STATE Outputs
General Description
The LVTH16652 consists of sixteen bus transceiver circuits
with D-type flip-flops, and control circuitry arranged for mul-
tiplexed transmission of data directly from the input bus or
from the internal registers. Each byte has separate control
inputs which can be shorted together for full 16-bit opera-
tion. Data on the A or B bus will be clocked into the regis-
ters as the appropriate clock pin goes to the HIGH logic
level. Output Enable pins (OEAB, OEBA) are provided to
control the transceiver function (see Functional Descrip-
tion).
The LVTH16652 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
The transceivers are designed for low-voltage (3.3V) VCC
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVTH16652 is fabricated
with an advanced BiCMOS technology to achieve high
speed operation similar to 5V ABT while maintaining low
power dissipation.
Features
s Input and output interface capability to systems at
5V VCC
s Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
s Live insertion/extraction permitted
s Power Up/Down high impedance provides glitch-free
bus loading
s Outputs source/sink
32 mA/+64 mA
s Functionally compatible with the 74 series 16652
s Latch-up performance exceeds 500 mA
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Order Number
Package Number
Package Description
74LVTH16652MEA
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
74LVTH16652MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
相关PDF资料
PDF描述
SN74LVTH16652MEA LVT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
SN74LVTH16835DGG LVT SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56
SN74LVTH240ADW LVT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20
SN74LVTH240ADBR LVT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20
SN74LVTH573DGVR LVT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
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