参数资料
型号: SP6132HEU-L
厂商: Exar Corporation
文件页数: 3/14页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 10-MSOP
标准包装: 50
PWM 型: 电压模式
输出数: 1
频率 - 最大: 360kHz
占空比: 100%
电源电压: 4.5 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 管件
ELECTRICAL SPECIFICATIONS: Continued
Unless otherwise specified: 0 ° C < T AMB < 70 ° C, 4.5V < V CC < 5.5V, BST=V CC ,SWN = GND = ZeroV, UVIN = 3.0V, CV CC =
10 μ F, C COMP = 0.1 μ F, CGH = CGL = 3.3nF, C SS = 50nF, Typical measured at V CC =5V. The ? denotes the specifications
which apply over the full operating temperature range, unless otherwise specified.
PARAMETER
MIN
TYP
MAX
UNITS
CONDITIONS
TIMERS: SOFTSTART
SS Charge Current:
10
μ A
SS Discharge Current:
1
mA
?
Fault Present, SS = 0.2V
PROTECTION: SHORT CIRCUIT & THERMAL
Short Circuit Threshold Voltage
Hiccup Timeout
Number of Allowable Clock Cycles
0.2
0.25
200
20
0.3
V
ms
Cycles
Measured V REF (0.8V) - V FB
V FB = 0.5V
V FB = 0.7V
at 100% Duty Cycle
Minimum GL Pulse After 20 Cycles
Thermal Shutdown Temperature
Thermal Recovery Temperature
Thermal Hysteresis
0.5
145
135
10
Cycles
° C
° C
° C
V FB = 0.7V
OUTPUT: NFET GATE DRIVERS
GH & GL Rise Times
GH & GL Fall Times
GL to GH Non Overlap Time
SWN to GL Non Overlap Time
35
30
45
25
50
40
70
40
ns
ns
ns
ns
?
?
?
?
Measured 10% to 90%
Measured 90% to 10%
GH & GL Measured at 2.0V
Measured SWN = 100mV to GL = 2.0V
GH & GL Pull Down Resistance
15
50
85
K ?
?
PIN DESCRIPTION
PIN #
PIN NAME DESCRIPTION
1
2
V CC
GL
Bias Supply Input. Connect to external 5V supply. Used to power internal circuits and
low side gate driver.
High current driver output for the low side NFET switch. It is always low if GH is high or
during a fault. Resistor pull down ensures low state at low voltage.
3
GND Ground Pin. The control circuitry of the IC and lower power driver are referenced to this
pin. Return separately from other ground traces to the (-) terminal of C OUT .
4
V FB
Feedback Voltage and Short Circuit Detection pin. It is the inverting input of the Error
Amplifier and serves as the output voltage feedback point for the Buck Converter. The
output voltage is sensed and can be adjusted through an external resistor divider.
Whenever V FB drops 0.25V below the positive reference, a short circuit fault is detected
and the IC enters hiccup mode.
5
6
COMP Output of the Error Amplifier. It is internally connected to the non-inverting input of the
PWM comparator. An optimal filter combination is chosen and connected to this pin and
either ground or V FB to stabilize the voltage mode loop.
UVIN UVLO input for V IN voltage. Connect a resistor divider between V IN and UV IN to set
minimum operating voltage.
7
SS
Soft Start. Connect an external capacitor between SS and GND to set the soft start rate
based on the 10 μ A source current. The SS pin is held low via a 1mA (min) current during
all fault conditions.
8
SWN Lower supply rail for the GH high-side gate driver. Connect this pin to the switching node
at the junction between the two external power MOSFET transistors.
9
GH
High current driver output for the high side NFET switch. It is always low if GL is high or
during a fault. Resistor pull down ensures low state at low voltage.
10
BST High side driver supply pin. Connect BST to the external boost diode and capacitor as
shown in the Typical Application Circuit on page 1. High side driver is connected between
BST pin and SWN pin.
Date:2/14/06
SP6132H High Voltage, Synchronous PWM Controller
3
? Copyright 2006 Sipex Corporation
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