参数资料
型号: SP6654EU-L
厂商: Exar Corporation
文件页数: 8/17页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 0.8A 10MSOP
标准包装: 50
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 1 V ~ 5.5 V
输入电压: 2.7 V ~ 5.5 V
电流 - 输出: 800mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 管件
供应商设备封装: 10-MSOP
OPERATION
The SP6654 is a high efficiency synchronous
buck regulator with an input voltage range of
+2.7V to +5.5V and an output that is adjustable
between +1.0V and V IN . The SP6654 features a
unique on-time control loop that runs in discon-
tinuous conduction mode (DCM) or continuous
conduction mode (CCM) using synchronous
rectification. Other features include, over-cur-
rent protection, digitally controlled enable and
DRVON
I(L1)
RAMP: CCM OPERATION
REF, FB
under-voltage lockout, an external feedback pin,
and a power good indicator.
FB’
V OS
REF’
The SP6654 operates with a light load quiescent
current of 20 μ A using a 0.3 ? PMOS main
switch and a 0.3 ? NMOS synchronous switch.
It operates with excellent efficiency across the
entire load range, making it an ideal solution for
battery powered applications and low current
step-down conversions. The part smoothly tran-
sitions into a 100% duty cycle under heavy load/
low input voltage conditions.
On-Time Control - Charge Phase
DRVON
I(L1)
RAMP: DCM OPERATION
The SP6654 uses a precision comparator and a
minimum on-time to regulate the output voltage
and control the inductor current under normal
load conditions. As the feedback pin drops be-
low the regulation point, the loop comparator
output goes high and closes the main switch.
FB’
REF’
REF, FB
V OS
The minimum on-timer is triggered, setting a
logic high for the duration defined by:
is added to FB and this creates the FB's signal.
This FB signal is applied to the negative termi-
T ON =
where:
K ON
V IN - V OUT
nal of the loop comparator. To the positive
terminal of the loop comparator is applied the
REF voltage of 0.8V plus an offset voltage Vos
to compensate for the DC level of V RAMP ap-
K ON = 2.25V* μ sec constant
V IN = V IN pin voltage
V OUT = V OUT pin voltage
To accommodate the use of ceramic and other
low ESR capacitors, an open loop ramp is added
to the feedback signal to mimic the inductor
current ripple. The following waveforms de-
scribe the ideal ramp operation in both CCM and
DCM operation.
In either CCM or DCM, the negative going
ramp voltage (V RAMP in the functional diagram)
plied to the negative terminal. The result is an
internal ramp with enough negative going offset
(approximately 50mV) to trip the loop com-
parator whenever FB falls below regulation.
The output of the loop comparator, a rising
VOLOW, causes a SET if BLANK = 0 and
OVR_I = 0. This starts inductor charging
(DRVON = 1) and starts the minimum on-timer.
The minimum on-timer times out and indicates
DRVON can be reset if the voltage loop is
satisfied. If V OUT is still below the regulation
point RESET is held low until V OUT is above
Date: 2/1/05
SP6654 High Efficiency 800mA Synchronous Buck Regulator
8
? Copyright 2005 Sipex Corporation
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