参数资料
型号: SP7514BN
元件分类: DAC
英文描述: PARALLEL, WORD INPUT LOADING, 2 us SETTLING TIME, 14-BIT DAC, PDSO20
封装: 0.300 INCH, SOIC-20
文件页数: 3/7页
文件大小: 144K
代理商: SP7514BN
HS3140/SP7514
HS3140/SP7514 14-Bit Multiplying DACs
Copyright 2000 Sipex Corporation
3
0.048%
0.024%
0.012%
0.006%
0.003%
4
LINEARITY
-
%
6
8
10
12
14
16
18
V DD -VOLTS
Linearity vs. Supply Voltage
2.5
4
10
I
6
8
10
12
14
16
18
2.0
1.5
1.0
DD
-mA
V
DD
-VOLTS
Power Supply Current vs. Voltage
0.048
0.024
0.012
0.006
0.003
0.01
0.1
1
10
INTEGRAL
LINEARITY
ERROR
-
%
VREF -VOLTS
Integral Linearity Error vs. Reference Voltage
50
40
30
20
10
0
010
2030
40
50
2 LSB
1 LSB
1/2 LSB @ 16 BITS
LINEARITY
ERROR
-
PPM
VOS-mV
Additional Linearity Error vs. Output-Amplifier
Offset-Voltage (V
REF = + 10V)
0.01
4
GAIN
CHANGE
-
%
6
8
10
12
14
16
18
0.004
0.002
0
V
DD
-VOLTS
0.008
0.006
Gain Change vs. Supply Voltage
CHARACTERISTIC CURVES
(Typical @ + 25
°C, V
DD = + 15VDC, VREF = + 10VDC, unless otherwise noted)
SPECIFICATIONS (continued)
(Typical @ 25
°C, nominal power supply, V
REF = +10V, unipolar unless otherwise noted)
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
ENVIRONMENTAL AND MECHANICAL
Operating Temperature
SP7514JN/KN
0
+70
°C
SP7514AN/BN
–40
+85
°C
HS3140–C
0
+70
°C
HS3140–B
–55
+125
°C
HS3140–B/883
–55
+125
°C
Storage Temperature
–65
+150
°C
Package
SP7514_N
20-pin SOIC
HS3140
20–pin Side–Brazed DIP
Notes:
1.
Digital input voltage must not exceed supply voltage or go below –0.5V ; “0” <0.8V; 2.4V < “1”
≤V
DD.
2.
AC or DC; use R6758–1 for fixed reference applications
3.
Using the internal feedback resistor and an external op amp. The Scale Factor can be adjusted externally by variable resistors in series with the
reference input and/or in series to the internal feedback resistor. Please refer to the Applications Information section.
4.
At 25
°C; the output leakage current will create an offset voltage at the external op amps output. It doubles every 10°C temperature increase.
5.
Integral Linearity is measured as the arithmetic mean value of the magnitudes of the greatest positive deviation and the greatest negative deviation from
the theoretical value for any given input combination.
6.
Differential Linearity is the deviation of an output step form the theoretical value of 1LSB for any two adjacent digital input codes.
7.
At 25
°C, the output leakage current will create an offset voltage output. It doubles every 10°C temperature increase.
8.
Using the internal feedback resistor and an external op amp.
9.
Use series 470ohm resistor to limit start-up current.
相关PDF资料
PDF描述
SP7514JN PARALLEL, WORD INPUT LOADING, 2 us SETTLING TIME, 14-BIT DAC, PDSO20
SP7514KN PARALLEL, WORD INPUT LOADING, 2 us SETTLING TIME, 14-BIT DAC, PDSO20
SP7516JN PARALLEL, WORD INPUT LOADING, 2 us SETTLING TIME, 16-BIT DAC, PDSO24
SP7516AN PARALLEL, WORD INPUT LOADING, 2 us SETTLING TIME, 16-BIT DAC, PDSO24
SP7516JN PARALLEL, WORD INPUT LOADING, 2 us SETTLING TIME, 16-BIT DAC, PDSO24
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