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HS3140/SP7514
HS3140/SP7514 14-Bit Multiplying DACs
Copyright 2000 Sipex Corporation
5
2 - 1(MSB)
2 - 2
Output
00
0
1
1/4 Full-Scale
1
0
1/2 Full-Scale
1
3/4 Full-Scale
Table 1. Contribution of the two MSB's
VREF
VDD
470
DIGITAL
INPUTS
RFEEDBACK
I O1
+
-
I O2
GND
ROS
A
V OUT
SP7514
HS3140
200
400
Figure 2. Unipolar Operation
accuracy required of any switch for a given overall
converter accuracy.
With the decoded converter described above, a 1%
change in any of the converter’s switches will affect
the output by no more than 0.25% of full-scale as
compared to 0.5% for a conventional converter. In
other words the conventional D/A converter can be
made less sensitive to the quality of its individual bits
by decoding.
In the SP7514/HS3140 the first four MSB’s are
decodedinto16levelswhichdrive15equallyweighted
current sources. The sensitivity of each switch on the
output is reduced by a factor of 8. Each of the 15
sources contributes 6.25% output change rather than
an MSB change of 50% for the common approach.
FollowingthedecodedsectionoftheDACastandard
binary weighted R-2R approach is used. This divides
each of the 16 levels (or 6.25% of F.S.) into 4096
discrete levels (the 12 LSB’s).
Output Capacitance
The SP7514/HS3140 have very low output capaci-
tance(C
O). This is specified both with all switches ON
andallswitchesOFF.Outputcapacitancevariesfrom
50pF to 100pF over all input codes. This low capaci-
tance is due in part to the decoding technique used.
Smaller switches are used with resulting less capaci-
tance. Three important system characteristics are
affected by C
O and CO; namely digital feedthrough,
settlingtime,andbandwidth.TheDACoutputequiva-
lent circuit can be represented as shown in Figure 1.
Digitalfeedthroughisthechangeinanalogoutputdue
to the toggling conditions on the converter input data
lines when the analog input V
REF is at 0V. The
SP7514/HS3140verylowC
O andthereforewillyield
low digital feedthrough. Inputs to the DAC can be
buffered.Thisinputlatchwithmicroprocessorcontrol
is shown in Figure 4.
SettlingtimeisdirectlyaffectedbyC
O.InFigure1,CO
combines with R
f to add a pole to the open loop
response, reducing bandwidth and causing excessive
phase shift - which could result in ringing and/or
oscillation.Afeedbackcapacitor,C
f must be added to
restore stability. Even with C
f, there is still a zero-pole
mismatch due to R
iCO which is code dependent. This
codedependentmismatchisminimizedwhenC
ORi =
R
fCf. However Cf must now be made larger to
compensate for worst case
R
iCO - resulting in re-
ducedbandwidthandincreasedsettlingtime.Withthe
SP7514/HS3140, small values for C
f must be used.
DIGITAL
INPUTS
RFEEDBACK
I O1
+
-
IO2
GND
ROS1
A
VOUT
1
+
-
A2
ROS2
V OUT1
A1, A2, OP-07
4K
4K
ROS2
R
200
VREF
VDD
470
400
SP7514
HS3140
Figure 3. Bipolar Operation
TRANSFER FUNCTION (N=14)
BINARY INPUT UNIPOLAR OUTPUT BIPOLAR OUTPUT
111...111
–V
REF (1 - 2
–N
)–V
REF (1 – 2
–(N – 1)
)
100...001
–V
REF (1/2 + 2
–N
)–V
REF (2
–(N – 1)
)
100...000
–V
REF /2
0
011...111
–V
REF (1/2 – 2
–N
)V
REF (2
–(N – 1)
)
000…001
–V
REF (2
(N – 1)
)V
REF (1 – 2
–(N – 1)
)
000...000
0
V
REF
Table 2. Transfer Function