参数资料
型号: SP7655EB
厂商: Exar Corporation
文件页数: 5/16页
文件大小: 0K
描述: EVAL BOARD FOR SP7655
标准包装: 1
系列: *
THEORY OF OPERATION
tures include thermal shutdown and short-cir-
cuit detection. In the event that either a thermal,
short-circuit, or UVLO fault is detected, the
SP7655 is forced into an idle state where the
output drivers are held off for a finite period
before a restart is attempted.
Soft Start
“Soft Start” is achieved when a power converter
ramps up the output voltage while controlling
the magnitude of the input supply source cur-
rent. In a modern step down converter, ramping
up the positive terminal of the error amplifier
controls soft start. As a result, excess source
current can be defined as the current required to
charge the output capacitor.
Thermal and Short-Circuit
Protection
Because the SP7655 is designed to drive large
output current, there is a chance that the power
converter will become too hot. Therefore, an
internal thermal shutdown (145 ° C) has been
included to prevent the IC from malfunctioning
at extreme temperatures.
A short-circuit detection comparator has also
been included in the SP7655 to protect against
an accidental short at the output of the power
converter. This comparator constantly monitors
the positive and negative terminals of the error
amplifier, and if the V FB pin falls more than
250mV (typical) below the positive reference, a
short-circuit fault is set. Because the SS pin
IV IN = C OUT * ( V OUT /
T SOFT-START )
overrides the internal 0.8V reference during soft
start, the SP7655 is capable of detecting short-
circuit faults throughout the duration of soft
The SP7655 provides the user with the option to
program the soft start rate by tying a capacitor
from the SS pin to GND. The selection of this
capacitor is based on the 10 μ A pullup current
present at the SS pin and the 0.8V reference
voltage. Therefore, the excess source can be
redefined as:
IV IN = C OUT * ( V OUT *10 μ A / (C SS * 0.8V)
Under Voltage Lock Out (UVLO)
The SP7655 contains two separate UVLO com-
parators to monitor the bias (V CC ) and conver-
sion (V IN ) voltages independently. The V CC
UVLO threshold is internally set to 4.25V,
whereas the V IN UVLO threshold is program-
mable through the UVIN pin. When the UVIN
pin is greater than 2.5V, the SP7655 is permitted
to start up pending the removal of all other
faults. Both the V CC and V IN UVLO compara-
tors have been designed with hysteresis to pre-
vent noise from resetting a fault.
start as well as in regular operation.
Handling of Faults:
Upon the detection of power (UVLO), thermal,
or short-circuit faults, the SP7655 is forced into
an idle state where the SS and COMP pins are
pulled low and both switches are held off. In the
event of UVLO fault, the SP7655 remains in this
idle state until the UVLO fault is removed.
Upon the detection of a thermal or short-circuit
fault, an internal 200ms timer is activated. In the
event of a short-circuit fault, a restart is at-
tempted immediately after the 200ms timeout
expires. Whereas, when a thermal fault is de-
tected, the 200ms delay continuously recycles
and a restart cannot be attempted until the ther-
mal fault is removed and the timer expires.
Error Amplifier and Voltage Loop
Since the heart of the SP7655 voltage error loop
is a high performance, wide bandwidth current-
limited (+/-150 μ A) transconductance ampli-
fier, there are many ways to compensate the
voltage loop or to control the COMP pin exter-
nally. If a simple, single pole, single zero
response is desired, then compensation can be
Rev E: 3/2 /07
SP7655 Wide Input Voltage Range 8A, 300kHz, Buck Regulator
5
? 2007 Sipex Corporation
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