参数资料
型号: SP7662EB
厂商: Exar Corporation
文件页数: 9/19页
文件大小: 0K
描述: EVAL BOARD FOR SP7662
标准包装: 1
系列: *
S P 7 6 6 2
P o w e r b l o x T M
1 2 A 3 0 0 K H z S y n c h r o n o u s S t e p D o w n R e g u l a t o r
THEORY OF OPERATION
G ENERAL O VERVIEW
The SP7662 is a fixed frequency, voltage
mode, synchronous PWM regulator optimized
for high efficiency. The part has been
specifically designed for single supply
operation from a 5V to 22V input.
The heart of the SP7662 is a wide bandwidth
transconductance amplifier designed to
S OFT S TART
“Soft Start” is achieved when a power con -
verter ramps up the output voltage while
controlling the magnitude of the input supply
source current. In a modern step down
converter, ramping up the positive terminal of
the error amplifier controls soft start. As a
result, excess source current can be defined as
the current required to charge the output
capacitor.
accommodate Type II and
Type III
compensation schemes. A precision 0.8V
reference, present on the positive terminal of
the error amplifier, permits the programming
of the output voltage down to 0.8V via the VFB
pin. The output of the error amplifier, COMP, is
compared to a 1.1V peak-to-peak ramp, which
is responsible for trailing edge PWM control.
This voltage ramp and PWM control logic are
governed by the internal oscillator that
accurately sets the PWM frequency to 300kHz.
The SP7662 contains two unique control
features that are very powerful in distributed
applications. First, non-synchronous driver
control is enabled during startup, to prohibit
the low side switch from pulling down the
output until the high side switch has
attempted to turn on. Second, a 100% duty
cycle timeout ensures that the low side switch
is periodically enhanced during extended
periods at 100% duty cycle. This guarantees
the synchronized refreshing of the BST
capacitor during very large duty ratios.
The SP7662 also contains a number of
valuable protection features. Programmable
V IN UVLO allows the user to set the exact
value at which the conversion voltage can
safely begin down-conversion, and an internal
VCC UVLO which ensures that the controller
itself has enough voltage to properly operate.
The SP7662 provides the user with the option
to program the soft start rate by tying a
capacitor from the SS pin to GND. The
selection of this capacitor is based on the
10μA pull up curren t present at the SS pin and
the 0.8V reference voltage. Therefore, the
excess source can be redefined as:
U NDER V OLTAGE L OCK O UT (UVLO)
The SP7662 has two separate UVLO
comparators to monitor the bias (Vcc) and
Input (V IN ) voltages independently. The Vcc
UVLO is internally set to 4.25V. The Vin UVLO
is programmable through UVIN pin. When
UVIN pin is greater than 2.5V the SP7662 is
permitted to start up pending the removal of
all other faults. A pair of internal resistors is
connected to UVIN as shown in Figure 15.
Other protection
features include thermal
shutdown and short-circuit detection. In the
event that either a thermal, short-circuit, or
UVLO fault is detected, the SP7662 is forced
into an idle state where the output drivers are
held off for a finite period before a restart is
attempted.
Fig. 18: Internal and External Bias of UVIN
Therefore without external biasing the V IN
start threshold is 9.5V. A small capacitor may
be required between UVIN and GND to filter
out noise. For applications with V IN of 5V or
3.3V, connect UVIN directly to V IN . To program
the V IN start threshold, use a pair of external
? 2012 Exar Corporation
9/19
Rev. 2.1.0
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