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参数资料
| 型号： | SP7663ER-L/TR |
| 厂商： | Exar Corporation |
| 文件页数： | 10/18页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 6A 26DFN |
| 标准包装： | 3,000 |
| 系列： | Power Blox™ |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 可调至 0.8V |
| 输入电压： | 5 V ~ 22 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 600kHz |
| 电流 - 输出： | 6A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 26-VFDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 26-DFN（7x4） |
S P 7 6 6 3
P o w e r b l o x T M
6 A 6 0 0 K H z S y n c h r o n o u s S t e p D o w n R e g u l a t o r
In the event of UVLO fault, the SP7663
remains in this idle state until the UVLO fault
is removed. Upon the detection of a thermal or
short-circuit fault, an internal 120ms timer is
activated. In the event of a short-circuit fault,
a restart is attempted immediately after the
120ms timeout expires. Whereas, when a
thermal fault is detected the 100ms delay
continuously recycles and a restart cannot be
Fig. 17: Over Current Detection Circuit
for I MAX >60mV/DCR
Decreasing the Current Limit
If it is required to set I MAX <(60mV/DCR), a
resistor can be added as shown in Figure 18.
R 8 increases the net voltage detected by the
current-sense comparator. Voltage at the
positive and negative terminal of comparator
is given by:
Since the comparator is triggered at 60mV:
Combining the above equations and solving for
R 8 :
As an example: for I MAX of 5A and V OUT of 3.3V,
calculated R 8 is 1.1M Ω.
attempted until the thermal fault is removed
and the timer expires.
E RROR A MPLIFIER AND V OLTAGE L OOP
The heart of the SP7663 control loop is a high
performance, wide bandwidth
transconductance amplifier. Because of the
amplifier’s current limited (±150μA)
transconductance, there are many ways to
compensate the voltage loop or to control the
COMP pin externally. A simple, single pole,
single zero compensation can be a RC to
ground. However Exar recommends a Type II
or Type III compensation which eliminates the
gm of the amplifier from the control loop
equations. The amplifier has enough
bandwidth (45° at 4 MHz) and enough gain
(60dB) to run Type III compensation schemes
with adequate gain and phase margins at
cross over frequencies greater than 50kHz.
The common mode output of the error
amplifier is 0.9V to 2.2V. Therefore, the PWM
voltage ramp has been set between 1.1V and
2.2V to ensure proper 0% to 100% duty cycle
capability. The voltage loop also includes two
other very important features. One is a non-
synchronous startup mode. Basically, the
synchronous rectifier cannot turn on unless
the high side switch has attempted to turn on
or the SS pin has exceeded 1.7V. This feature
prevents the controller from “dragging down”
the output voltage during startup or in fault
modes.
Fig. 18: Over Current Detection Circuit
for I MAX <(60mV/DCR)
H ANDLING OF F AULTS
Upon the detection of power (UVLO), thermal,
or short-circuit faults, the SP7663 is forced
into an idle state where the SS and COMP pins
are pulled low and both switches are held off.
? 2012 Exar Corporation
10/18
Rev. 2.2.0
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