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参数资料
| 型号： | SP7663ER-L/TR |
| 厂商： | Exar Corporation |
| 文件页数： | 8/18页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 6A 26DFN |
| 标准包装： | 3,000 |
| 系列： | Power Blox™ |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 可调至 0.8V |
| 输入电压： | 5 V ~ 22 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 600kHz |
| 电流 - 输出： | 6A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 26-VFDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 26-DFN（7x4） |
S P 7 6 6 3
P o w e r b l o x T M
6 A 6 0 0 K H z S y n c h r o n o u s S t e p D o w n R e g u l a t o r
THEORY OF OPERATION
G ENERAL O VERVIEW
The SP7663 is a fixed frequency, voltage
mode, synchronous PWM regulator optimized
for high efficiency. The part has been
specifically designed for single supply
operation from a 5.5V to 22V input.
The heart of the SP7663 is a wide bandwidth
transconductance amplifier designed to
accommodate Type II and Type III
compensation schemes. A precision 0.8V
reference, present on the positive terminal of
the error amplifier, permits the programming
of the output voltage down to 0.8V via the VFB
pin. The output of the error amplifier, COMP, is
compared to a 1.1V peak-to-peak ramp, which
is responsible for trailing edge PWM control.
This voltage ramp and PWM control logic are
governed by the internal oscillator that
accurately sets the PWM frequency to 600kHz.
The SP7663 contains two unique control
features that are very powerful in distributed
applications. First, non-synchronous driver
control is enabled during startup, to prohibit
the low side switch from pulling down the
output until the high side switch has
attempted to turn on. Second, a 100% duty
cycle timeout ensures that the low side switch
is periodically enhanced during extended
periods at 100% duty cycle. This guarantees
the synchronized refreshing of the BST
capacitor during very large duty ratios.
The SP7663 also contains a number of
valuable protection features. Programmable
V IN UVLO allows the user to set the exact
value at which the conversion voltage can
safely begin down-conversion, and an internal
VCC UVLO which ensures that the controller
itself has enough voltage to properly operate.
Other protection features include thermal
shutdown and short-circuit detection. In the
event that either a thermal, short-circuit, or
UVLO fault is detected, the SP7663 is forced
into an idle state where the output drivers are
held off for a finite period before a restart is
attempted.
S OFT S TART
“Soft Start” is achieved when a power con -
verter ramps up the output voltage while
controlling the magnitude of the input supply
source current. In a modern step down
converter, ramping up the positive terminal of
the error amplifier controls soft start. As a
result, excess source current can be defined as
the current required to charge the output
capacitor.
The SP7663 provides the user with the option
to program the soft start rate by tying a
capacitor from the SS pin to GND. The
selection of this capacitor is based on the
10μA pull up current present at the SS pin and
the 0.8V reference voltage. Therefore, the
excess source can be redefined as:
U NDER V OLTAGE L OCK O UT (UVLO)
The SP7663 has two separate UVLO
comparators to monitor the bias (Vcc) and
Input (V IN ) voltages independently. The Vcc
UVLO is internally set to 4.25V. The Vin UVLO
is programmable through UVIN pin. When
UVIN pin is greater than 2.5V the SP7663 is
permitted to start up pending the removal of
all other faults. A pair of internal resistors is
connected to UVIN as shown in Figure 16.
Fig. 15: Internal and External Bias of UVIN
Therefore without external biasing the V IN
start threshold is 9.5V. A small capacitor may
be required between UVIN and GND to filter
? 2012 Exar Corporation
8/18
Rev. 2.2.0
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相关代理商/技术参数 |
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