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参数资料
| 型号： | SPL61A |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 80KB LCD Controller/Driver |
| 中文描述： | 80kb左右LCD控制器/驱动器 |
| 文件页数： | 7/15页 |
| 文件大小： | 737K |
| 代理商： | SPL61A |
SPL61A
5.10. Watch Dog Timer (WDT)
An on chip watchdog timer is available on SPL61A. The WDT is
designed for recovering from system abnormal operation. If the
system is hanged, WDT will generate a system reset to restart
system after 1 second. If WDT is enabled, the WDT should be
cleared every 0.5 seconds to avoid accidental reset. The WDT
can be cleared by writing to $0F. Note that the WDT only works
when 32768Hz clock is available.
5.11. Mask Options
5.11.1. 32768 oscillator
1). X’TAL
2). R-oscillator
5.11.2. Watchdog timer
1). Enable
2). Disable
5.11.3. TxD/RxD select
1). TxD as UART transmit output, RxD as UART receive input
2). TxD as I/O port EF4, RxD as I/O port EF5
5.11.4. Port EF Bit7 - 0 with 600K
pull-low
1). Each bit can be optioned to Enable/Disable individually.
5.11.5. I/O and LCD driver
1). COM15 -14 can be optioned to IOEF7 - 6 when LCD mode is
1/8 duty or 1/12 duty.
2). SEG39 - 36 can be optioned to IOAB3 - 0 individually.
Sunplus Technology Co., Ltd.
Proprietary & Confidential
7
AUG. 13, 2001
Version: 1.2
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