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参数资料
| 型号： | SPT7883SIR |
| 厂商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分类： | ADC |
| 英文描述： | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封装： | SSOP-28 |
| 文件页数： | 1/8页 |
| 文件大小： | 230K |
| 代理商： | SPT7883SIR |
Features
2.5V power supply
SNR: 59.5dB @ IN = 10MHz, S = 70 MSPS;
57dB @ IN = 30MHz
Low power dissipation: 129mW @ 2.5V;
Sleep mode: 17mW
Sample rate: 10–115 MSPS
Frequency-dependent biasing
Internal sample-and-hold
Differential input
Low input capacitance
9.5 ENOBs @ IN = 10MHz, S = 70 MSPS
SFDR: 77.5dB
Applications
Imaging
Computer scanners
Communications
Set top boxes
Video products
Battery-operated equipment
Portable test equipment
Description
The SPT7883 is a compact, high-speed, low-power 10-bit
monolithic analog-to-digital converter, implemented in a 0.25
m
CMOS process. It has 10-bit resolution with 9.5 effective bits
and spurious-free dynamic range (SFDR) of 77.5dB for 10MHz
input signals. The converter includes a high bandwidth
sample-and-hold. The full-scale range can be set between
±0.5V and ±1.5V. It operates from a single 2.5V supply. Its
low distortion and high dynamic range provide the performance
needed for demanding imaging, video, and communications
applications.
The bias current level for the ADC is automatically adjusted
based on the clock input frequency. Hence, the power
dissipation of the device is continuously optimized for the
operating frequency.
The SPT7883 has a pipelined architecture, resulting in low input
capacitance. Digital error correction of the 9 most significant
bits ensures good linearity for input frequencies approaching
Nyquist.
The SPT7883 is available in a 28-lead SSOP package over the
industrial temperature range (-40°C to +85°C).
SPT7883
10-bit, 70 MSPS A/D Converter
www.fairchildsemi.com
Rev. 1a March 2003
Block Diagram
ADC
REFP
REFN
EXTREF BIAS0 BIAS1
INN
INP
CLK
Clock
Circuit
Correction
Logic
CM
OE
Digital
Outputs
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