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参数资料
| 型号： | SPT8100SIT |
| 厂商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分类： | ADC |
| 英文描述： | 16-BIT, 5 MSPS CMOS A/D CONVERTER |
| 中文描述： | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP44 |
| 封装： | PLASTIC, LQFP-44 |
| 文件页数： | 3/10页 |
| 文件大小： | 91K |
| 代理商： | SPT8100SIT |
3
1/9/02
SPT8100
ELECTRICAL SPECIFICATIONS
T
A
=T
MIN
to T
MAX
, AV
DD
=DV
DD
=+5.0 V, OV
DD
= 3.3 V,
S
=5 MSPS, 2.5 V
PP
input span, Gain=0 dB, R
EXT
=1.43 k
, unless
otherwise specified.
TEST
CONDITIONS
TEST
LEVEL
SPT8100
TYP
PARAMETERS
MIN
MAX
UNITS
Dynamic Performance
1
Effective Number of Bits
IN
= 60 kHz
IN
= 900 kHz
Signal-to-Noise Ratio
(without Harmonics)
IN
= 75 kHz
IN
= 900 kHz
Harmonic Distortion
IN
= 60 kHz
IN
= 900 kHz
Signal-to-Noise and Distortion
(SINAD)
IN
= 60 kHz
IN
= 900 kHz
Spurious Free Dynamic Range
3
IN
= 60 kHz
IN
= 900 kHz
IN
= 2 MHz
IN
= 3 MHz
Two-Tone Intermodulation
3rd Order Distortion
ADC Input =
–
1 dBFS
2
IV
V
12.2
13.0
12.7
Bits
Bits
ADC Input =
–
1 dBFS
2
IV
V
78
81
80
dB
dB
ADC Input =
–
0.5 dBFS
IV
V
–
92
–
82
–
84
dB
dB
ADC Input =
–
1 dBFS
IV
V
75
80
78
dB
dB
ADC Input =
–
0.5 dB
IV
V
V
V
85
94
94
83
78
dBc
dBc
dBc
dBc
R
EXT
= 1 k
@ 10 MSPS
R
EXT
= 1 k
@ 10 MSPS
1
=400 kHz,
2
=410 kHz
4
1
=890 kHz,
2
=900 kHz
5
V
V
–
94
–
89
dB
dB
Inputs
GS0
–
GS2 Logic 1 Voltage
GS0
–
GS2 Logic 0 Voltage
CLK,
RS
Logic 1 Voltage
CLK,
RS
Logic 0 Voltage
Maximum Input Current Low
Maximum Input Current High
Input Capacitance
VI
VI
VI
VI
VI
VI
V
2.4
V
V
V
V
μA
μA
pF
0.8
2.0
0.8
+10
+10
–
10
–
10
5
Digital Outputs
Logic 1 Voltage
Logic 0 Voltage
CLK to Output Delay Time (t
D
)
I
OH
=
–
2 mA
I
OL
= 2 mA
C
LOAD
= 20 pF
VI
VI
IV
OV
DD
–
0.5
V
V
ns
0.4
30
Power Supply Requirements
Voltages
OV
DD
AV
DD
DV
DD
I
DD
IV
IV
IV
VI
VI
3.0
4.75
4.75
3.3
5.0
5.0
93
465
5.25
5.25
5.25
103
515
V
V
V
mA
mW
Currents
Power Dissipation
1
Dynamic performance tested at
S
=4.4 MSPS
2
0 dBFS is 5.0 V peak-to-peak differential
3
ADC Input =
–
8.1 dBFS, unless otherwise noted
4
Test Conditions: PGA setting of 5.8 dB; Analog Input at ADC =
–
0.7 dB
5
Test Conditions: PGA setting of 0 dB; Analog Input at ADC =
–
1.9 dB
TEST LEVEL CODES
All electrical characteristics are subject
to the following conditions:
All parameters having min/max specifi-
cations are guaranteed. The Test Level
column indicates the specific device
testing actually performed during
production and Quality Assurance
inspection. Any blank section in the data
column indicates that the specification is
not tested at the specified condition.
TEST LEVEL
I
II
TEST PROCEDURE
100% production tested at the specified temperature.
100% production tested at T
A
= +25
°
C, and sample tested at the
specified temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and characteriza-
tion data.
Parameter is a typical value for information purposes only.
100% production tested at T
A
= +25
°
C. Parameter is guaranteed
over specified temperature range.
III
IV
V
VI
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