参数资料
型号: SST25VF064C-80-4I-Q2AE-T
厂商: Microchip Technology
文件页数: 20/37页
文件大小: 0K
描述: IC FLASH SER 64M DUAL I/O 8WSON
标准包装: 2,000
系列: SST25
格式 - 存储器: 闪存
存储器类型: FLASH
存储容量: 64M(8M x 8)
速度: 80MHz
接口: SPI 串行
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-WDFN 裸露焊盘
供应商设备封装: 8-WSON
包装: 带卷 (TR)
64 Mbit SPI Serial Dual I/O Flash
A Microchip Technology Company
SST25VF064C
Data Sheet
Chip-Erase
The Chip-Erase instruction clears all bits in the device to FFH. A Chip-Erase instruction will be ignored
if any of the memory area is protected. Prior to any Write operation, the Write-Enable (WREN) instruction
must be executed. CE# must remain active low for the duration of the Chip-Erase instruction sequence.
Initiate the Chip-Erase instruction by executing an 8-bit command, 60H or C7H. CE# must be driven high
before the instruction is executed. Poll the Busy bit in the software status register or wait T CE for the comple-
tion of the internal self-timed Chip-Erase cycle. See Figure 15 for the Chip-Erase sequence.
CE#
MODE 3
0 1 2 3 4 5 6 7
SCK
SI
SO
MODE 0
60 or C7
MSB
HIGH IMPEDANCE
1392 F16.0
Figure 15: Chip-Erase Sequence
Read Security ID
To execute a Read SID operation, the host drives CE# low, sends the Read SID command cycle (88H),
one address cycle, and then one dummy cycle. Each cycle is eight bits long, most significant bit first.
After the dummy cycle, the device outputs data on the falling edge of the SCK signal, starting from the
specified address location. The data output stream is continuous through all SID addresses until termi-
nated by a low-to-high transition on CE#. The internal address pointer automatically increments until
the last SID address is reached, then outputs wrap around until CE# goes high.
Lockout Security ID
The Lockout SID instruction prevents any future changes to the Security ID. Prior to the Lockout SID
operation, the Write-Enable (WREN) instruction must be executed. To execute a Lockout SID, the host
drives CE# low, sends the Lockout SID command cycle (85H), then drives CE# high. A cycle is 8 bits
long, most significant bit first. The user may poll the BUSY bit in the software status register or waits
T PSID for the completion of the Lockout SID operation.
?2011 Silicon Storage Technology, Inc.
20
DS25036A
06/11
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