参数资料
型号: SST39VF3201-70-4I-EKE-T
厂商: Microchip Technology
文件页数: 9/34页
文件大小: 0K
描述: IC FLASH MPF 32MBIT 70NS 48TSOP
标准包装: 1,000
系列: SST39 MPF™
格式 - 存储器: 闪存
存储器类型: FLASH
存储容量: 32M(2M x 16)
速度: 70ns
接口: 并联
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 48-TFSOP(0.724",18.40mm 宽)
供应商设备封装: 48-TSOP
包装: 带卷 (TR)
16 Mbit / 32 Mbit Multi-Purpose Flash Plus
SST39VF1601 / SST39VF3201
A Microchip Technology Company
SST39VF1602 / SST39VF3202
Not Recommended for New Designs
Hardware Block Protection
The SST39VF1602/3202 support top hardware block protection, which protects the top 32 KWord
block of the device. The SST39VF1601/3201 support bottom hardware block protection, which pro-
tects the bottom 32 KWord block of the device. The Boot Block address ranges are described in Table
3. Program and Erase operations are prevented on the 32 KWord when WP# is low. If WP# is left float-
ing, it is internally held high via a pull-up resistor, and the Boot Block is unprotected, enabling Program
and Erase operations on that block.
Table 3: Boot Block Address Ranges
Product
Bottom Boot Block
SST39VF1601/3201
Top Boot Block
SST39VF1602
SST39VF3202
Address Range
000000H-007FFFH
0F8000H-0FFFFFH
1F8000H-1FFFFFH
T3.0 25028
Hardware Reset (RST#)
The RST# pin provides a hardware method of resetting the device to read array data. When the RST#
pin is held low for at least T RP, any in-progress operation will terminate and return to Read mode. When
no internal Program/Erase operation is in progress, a minimum period of T RHR is required after RST#
is driven high before a valid Read can take place (see Figure 16).
The Erase or Program operation that has been interrupted needs to be reinitiated after the device
resumes normal operation mode to ensure data integrity.
Software Data Protection (SDP)
The SST39VF160x/320x provide the JEDEC approved Software Data Protection scheme for all data
alteration operations, i.e., Program and Erase. Any Program operation requires the inclusion of the
three-byte sequence. The three-byte load sequence is used to initiate the Program operation, provid-
ing optimal protection from inadvertent Write operations, e.g., during the system power-up or power-
down. Any Erase operation requires the inclusion of six-byte sequence. These devices are shipped
with the Software Data Protection permanently enabled. See Table 6 for the specific software com-
mand codes. During SDP command sequence, invalid commands will abort the device to read mode
within T RC. The contents of DQ 15 -DQ 8 can be V IL or V IH , but no other value, during any SDP command
sequence.
Common Flash Memory Interface (CFI)
The SST39VF160x/320x also contain the CFI information to describe the characteristics of the device.
In order to enter the CFI Query mode, the system must write three-byte sequence, same as product ID
entry command with 98H (CFI Query command) to address 5555H in the last byte sequence. Once the
device enters the CFI Query mode, the system can read CFI data at the addresses given in Tables 7
through 10. The system must write the CFI Exit command to return to Read mode from the CFI Query
mode.
?2011 Silicon Storage Technology, Inc.
9
DS25028A
08/11
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