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参数资料
| 型号： | SST89E58RD2-40-C-PIE |
| 厂商： | SILICON STORAGE TECHNOLOGY INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PDIP40 |
| 封装： | LEAD FREE, PLASTIC, MS-011AC, DIP-40 |
| 文件页数： | 38/91页 |
| 文件大小： | 1017K |
| 代理商： | SST89E58RD2-40-C-PIE |
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Preliminary Specifications
FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
43
2004 Silicon Storage Technology, Inc.
S71255-00-000
3/04
Note: DISIAPL pin in PLCC or TQFP will also disable IAP commands if it is externally pulled low when reset.
TABLE
4-6: IAP COMMANDS1 FOR SST89E/V516RD2
Operation
SFCM [6:0]2
SFDT [7:0]
SFAH [7:0]
SFAL [7:0]
Chip-Erase3
01H
55H
X4
X
Block-Erase5
0DH
55H
AH
X
Sector-Erase5
0BH
X
AH6
AL7
Byte-Program5
0EH
DI8
AH
AL
Byte-Verify (Read)5
0CH
DO8
AH
AL
Prog-SB19
0FH
AAH
X
Prog-SB29
03H
AAH
X
Prog-SB39
05H
AAH
X
Prog-SC09
09H
AAH
5AH
X
Enable-Clock-Double9
08H
AAH
55H
X
T4-6.0 1255
1. SFCF[6]=1 enables IAP commands; SFCF[6]=0 disables IAP commands.
2. Interrupt/Polling enable for flash operation completion
SFCM[7] = 1: Interrupt enable for flash operation completion
0: polling enable for flash operation completion
3. Chip-Erase only functions in IAP mode when EA#=0 (external memory execution) and device is not in level 4 locking.
4. X can be VIL or VIH, but no other value.
5. Refer to Table 4-5 for address resolution
6. AH = Address high order byte
7. AL = Address low order byte
8. DI = Data Input, DO = Data Output, all other values are in hex.
9. Instruction must be located in Block 1 or external code memory.
TABLE
4-7: IAP COMMANDS1 FOR SST89E/V5XRD2
1. SFCF[6]=1 enables IAP commands; SFCF[6]=0 disables IAP commands.
Operation
SFCM [6:0]2
2. Interrupt/Polling enable for flash operation completion
SFCM[7] = 1: Interrupt enable for flash operation completion
0: polling enable for flash operation completion
SFDT [7:0]
SFAH [7:0]
SFAL [7:0]
Chip-Erase3
3. Chip-Erase only functions in IAP mode when EA#=0 (external memory execution) and device is not in level 4 locking.
01H
55H
X4
4. X can be VIL or VIH, but no other value.
X
Block-Erase
0DH
55H
AH5
5. AH = Address high order byte
X
Sector-Erase
0BH
X
AH
AL6
6. AL = Address low order byte
Byte-Program
0EH
DI7
7. DI = Data Input, DO = Data Output, all other values are in hex.
AH
AL
Byte-Verify (Read)8
8. SFAH[7:5] = 111b selects Block 1, SFAH[7] = 0b selects Block 0
0CH
DO7
AH
AL
Prog-SB19
9. Instruction must be located in Block 1 or external code memory.
0FH
AAH
X
Prog-SB29
03H
AAH
X
Prog-SB39
05H
AAH
X
Prog-SC09
09H
AAH
5AH
X
Prog-SC19
09H
AAH
X
Enable-Clock-Double9
08H
AAH
55H
X
T4-7.0 1255
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| SST89E516RD2-40-C-PIE | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PDIP40 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SST89E58RD2-40-C-PIE1 | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
| SST89E58RD2-40-C-PIF2 | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
| SST89E58RD2-40-C-PJ | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
| SST89E58RD2-40-C-PJE1 | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
| SST89E58RD2-40-C-PJF2 | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
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