参数资料
型号: ST16C450CQ48TR-F
厂商: Exar Corporation
文件页数: 23/28页
文件大小: 0K
描述: IC UART SINGLE 48TQFP
标准包装: 1,500
特点: *
通道数: 1,UART
FIFO's: 1 字节
电源电压: 2.97 V ~ 5.5 V
带故障启动位检测功能:
带调制解调器控制功能:
带CMOS:
安装类型: 表面贴装
封装/外壳: 48-TQFP
供应商设备封装: 48-TQFP(7x7)
包装: 带卷 (TR)
ST16C450
4
Rev. 4.20
Symbol
Pin
Signal
Pin Description
40
44
48
type
A0
28
31
28
I
Address-0 Select Bit Internal registers address selection.
A1
27
30
27
I
Address-1 Select Bit Internal registers address selection.
A2
26
29
26
I
Address-2 Select Bit Internal registers address selection.
IOR
22
25
20
I
Read data strobe. Its function is the same as -IOR (see -
IOR), except it is active high. Either an active -IOR or IOR
is required to transfer data from 16C450 to CPU during a
read operation.
CS0
12
14
9
I
Chip Select-0. Logical 1 on this pin provides the chip select-
0 function.
CS1
13
15
10
I
Chip Select-1. Logical 1 on this pin provides the chip select-
1 function.
-CS2
14
16
11
I
Chip Select -2. Logical 0 on this pin provides the chip select-
2 function.
IOW
19
21
17
I
Write data strobe. Its function is the same as -IOW (see -
IOW), but it acts as an active high input signal. Either -IOW
or IOW is required to transfer data from the CPU to
ST16C450 during a write operation.
-AS
25
28
24
I
Address Strobe. A logic 0 transition on -AS latches the state
of the chip selects and the register select bits, A0-A2. This
input is used when address and chip selects are not stable
for the duration of a read or write operation, i.e., a micropro-
cessor that needs to de-multiplex the address and data bits.
If not required, the -AS input can be permanently tied to a
logic 0 (it is edge triggered).
D0-D7
1-8
2-9
43-47
2-4
I/O
Data Bus (Bi-directional) - These pins are the eight bit, tri-
state data bus for transferring information to or from the
controlling CPU. D0 is the least significant bit and the first
data bit in a transmit or receive serial data stream.
GND
20
22
18
Pwr
Signal and Power Ground.
SYMBOL DESCRIPTION
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