- 您现在的位置：买卖IC网 > PDF目录98143 > ST52F513F1B6 (STMICROELECTRONICS) 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDIP20 PDF资料下载
参数资料
| 型号： | ST52F513F1B6 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDIP20 |
| 封装： | PLASTIC, DIP-20 |
| 文件页数： | 100/104页 |
| 文件大小： | 644K |
| 代理商： | ST52F513F1B6 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页当前第100页第101页第102页第103页第104页
ST52F510/F513/F514
95/104
Figure 15.2 Serial Peripheral Interface Block Diagram
Procedure
– Select the SPR0, SPR1 and SPR2 bits to define
the serial clock baud rate (see SPI_CR register).
– Select the CPOL and CPHA bits to define one of
the four relationships between the data transfer
and the serial clock (see Figure 15.4).
– The SS pin must be connected to a high level
signal during the complete byte transmit se-
quence.
– The MSTR and SPE bits must be set (they re-
main set only if the SS pin is connected to a high
level signal).
In this configuration the MOSI pin is a data output
and to the MISO pin is a data input.
Transmit sequence
Transmit sequence begins when a byte is written in
the SPI_OUT register.
The data byte is loaded in parallel into the 8-bit shift
register (from the internal bus) during a write cycle
and then shifted out serially to the MOSI pin most
significant bit first.
When data transfer is complete:
– The SPIF bit is set by hardware
– An interrupt is generated if the SPIE bit is set.
During the last clock cycle the SPIF bit is set, a
copy of the data byte received in the shift register
is moved to a buffer. When the SPI_IN register is
read, the SPI peripheral returns this buffered
value. Clearing the SPIF bit is performed by the
following software sequence:
1. An access to the SPI_STATUS_CR register
while the SPIF bit is set
2. A read to the SPI_IN register.
Note: While the SPIF bit is set, all writes to the
SPI_OUT
register
are
inhibited
until
the
SPI_STATUS_CR register is read.
SPI_IN
Read Buffer
8-Bit Shift Register
Write
Read
Internal Bus
SPI
SPIE
SPE
MSTR
CPHA
SPR0
SPR1
CPOL
SPIF WCOL
MODF
SERIAL
CLOCK
GENERATOR
MOSI
MISO
SS
SCK
CONTROL
STATE
SPI_CR
SPI_STATUS_CR
-
IT
request
MASTER
CONTROL
SPR2
OR
SSI
SSM
SOD
SPI_OUT
相关PDF资料 |
PDF描述 |
|---|---|
| ST52F513G1M6 | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDSO28 |
| ST52F513G1B6 | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDIP28 |
| ST52F510G2B6 | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDIP28 |
| ST52F510G3B6 | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDIP28 |
| ST52F514G3B6 | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDIP28 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ST52F513FMB6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI |
| ST52F513FMM6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI |
| ST52F513GMB6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI |
| ST52F513GMM6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI |
| ST52F513Y3M6 | 制造商:STMicroelectronics 功能描述: |
发布紧急采购，3分钟左右您将得到回复。