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参数资料
| 型号： | ST52F513F1B6 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDIP20 |
| 封装： | PLASTIC, DIP-20 |
| 文件页数： | 27/104页 |
| 文件大小： | 644K |
| 代理商： | ST52F513F1B6 |
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ST52F510/F513/F514
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4 MEMORY PROGRAMMING
ST52F510/F513/F514 provides an on-chip user
programmable non-volatile memory, which allows
fast and reliable storage of user data.
Program/Data
Memory
addressing
space
is
composed by a Single Voltage Flash Memory and
a RAM memory bench. The ST52F513/514
devices also have a Data EEPROM bench to store
permanent data with long term retention and a high
number of write/erase cycles.
All the Program Data memory addresses can
execute code, including RAM and EEPROM
benches.
The memory is programmed by setting the Vpp pin
equal to Vdd. Data and commands are transmitted
through the I2C serial communication protocol. The
same procedure is used to perform “In-Situ” the
programming of the device after it is mounted in
the user system. Data can also be written in run-
time with the In-Application Programming (IAP).
The Memory can be locked by the user during the
programming phase, in order to prevent external
operation such as reading the program code and
assuring protection of user intellectual property.
Flash and EEPROM pages can be protected by
unintentional writings.
Remark: the memory contents are protected by
the Error Correction Code (ECC) algorithm that
uses a 4-bit redundancy to correct one bit errors.
4.1 Program/Data Memory Organization
The Program/Data Memory is organized as
described in Section 3.3. The various sales types
have different amounts of each type of memory.
Table 4.1 describes the memory benches amount
and page allocation for each sales type.
Remark: some devices have RAM or EEPROM
memory benches of 128 bytes. The address range
inside the page of these benches is between 128
to 255.
The addressing spaces are organized in pages of
256 bytes. Each page is composed by blocks of 32
bytes. Memory programming is performed one
block at a time in order to speed-up the
programming time (about 2.5 ms per block).
The whole location address is composed as
follows:
15
87
54
0
Page add ress
Block address address insi de the block
Table 4.1 Sales Type Memory Organization
Device
Flash Memory
RAM Memory
EEPROM Memory
Amount
Pages
Amount
Page
Amount
Page(s)
ST52F510x0xx
1024 bytes
0 to 3
128 bytes
32*
-
ST52F510x1xx
2048 bytes
0 to 7
128 bytes
32*
-
ST52F510x2xx
4096 bytes
0 to 15
256 bytes
32
-
ST52F510x3xx
8192 bytes
0 to 31
256 bytes
32
-
ST52F513x0xx
896 bytes
0 to 3
128 bytes
32*
128 bytes
3*
ST52F513x1xx
1920 bytes
0 to 7
128 bytes
32*
128 bytes
7*
ST52F513x2xx
3840 bytes
0 to 14
256 bytes
32
256 bytes
15
ST52F513x3xx
7936 bytes
0 to 30
256 bytes
32
256 bytes
31
ST52F514x0xx
4096 bytes
0 to 15
256 bytes
32
512 bytes
16-17
ST52F514x1xx
4096 bytes
0 to 15
256 bytes
32
1024 bytes
16-19
ST52F514x2xx
4096 bytes
0 to 15
256 bytes
32
2048 bytes
16-23
ST52F514x3xx
4096 bytes
0 to 15
256 bytes
32
4096 bytes
16-31
(*) Addresses range from 128 to 255 inside the page
相关PDF资料 |
PDF描述 |
|---|---|
| ST52F513G1M6 | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDSO28 |
| ST52F513G1B6 | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDIP28 |
| ST52F510G2B6 | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDIP28 |
| ST52F510G3B6 | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDIP28 |
| ST52F514G3B6 | 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PDIP28 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ST52F513FMB6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI |
| ST52F513FMM6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI |
| ST52F513GMB6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI |
| ST52F513GMM6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI |
| ST52F513Y3M6 | 制造商:STMicroelectronics 功能描述: |
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